OPA653IDBVT datasheet(10/19 Pages) TI

10 / 19 page

OPERATING SUGGESTIONS

Setting Resistor Values to Minimize Noise

Driving Capacitive Loads

OPA653

=160 W

4kTR

4kT

IN+

IN-

OUT

e =

4kTR +(I R ) +e

+(I R ) +4kTR

[

]

OPA653

LOAD

OUT

160 W

IN+

IN-

ISO

LOAD

e =

4kTR +(I R ) +e

4kTR

I R

OPA653

SBOS348 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com

However, attention should be paid to the value of RT

or other source impedance on the noninverting input.

High-value resistive impedance on the noninverting

The OPA653 provides a low input noise voltage.

input can add significant noise; for example, 2.4 k

Ω

Figure 23 shows the op amp noise analysis model

adds a Johnson voltage noise term equal to the

with all the noise terms included. In this model, all the

amplifier itself (6.2 nV/

√Hz). So while the JFET input

noise terms are taken to be noise voltage or current

of the OPA653 is ideal for high source impedance

density terms in either nV/

√Hz or pA/√Hz.

applications in the noninverting configuration of

Figure 21, the overall bandwidth and noise are limited

by high source impedances.

One of the most demanding and yet very common

load conditions for an op amp is capacitive loading.

The OPA653 is very robust, but care should be taken

with light loading scenarios so output capacitance

does not lead to decreased stability, increased

frequency response peaking, overshoot, and ringing.

When the amplifier output resistance is considered,

capacitive loading introduces an additional pole in the

signal path that reduces the phase margin. Several

external

solutions

this

problem

have

been

suggested for standard op amps. Because the

OPA653 has internal gain-setting resistors, the only

real option is to use a series output resistor. This

Figure 23. Noise Analysis Circuit

option is a good solution because when the primary

considerations

are

frequency

response

flatness,

The total output spot noise voltage can be computed

pulse response fidelity, and/or distortion, a series

as the square root of the squared contributing terms

output resistor is the simplest and most effective

to the output noise voltage. This calculation adds all

technique. The idea is to isolate the capacitive load

the contributing noise powers at the output by

from the feedback loop by inserting a series isolation

superposition, then takes the square root to return to

resistor, RISO, between the amplifier output and the

a spot noise voltage. Equation 1 shows the general

capacitive load as shown in Figure 24 below. In

form for this output noise voltage using the terms

effect, this configuration isolates the phase shift from

shown in Figure 23.

the loop gain of the amplifier, thus restoring the

phase margin and improving stability.

(1)

Dividing this expression by the noise gain = 1 +

RF/RG gives the equivalent input-referred spot noise

voltage at the noninverting input as shown in

Equation 2

Figure 24. Adding Series Ouput Resistance to

Isolate Capacitive Loads

(2)

Putting high resistor values into Equation 2 can

quickly dominate the total equivalent input-referred

noise. Because the gain-setting resistors, RF and RG,

are internal to the device, the user cannot change this

noise contribution, and the noise gain is equal to +2

V/V.

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