TDA9885TSLASHV5 datasheet(13/56 Pages) NXP

13 / 56 page

TDA9885_TDA9886_3

Product data sheet

Rev. 03 — 16 December 2008

13 of 56

NXP Semiconductors

TDA9885; TDA9886

I2C-bus controlled multistandard alignment-free IF-PLL demodulators

The AF preampliﬁer used for FM sound is an operational ampliﬁer with internal feedback,

high gain and high common mode rejection. The AF voltage from the PLL demodulator is

5 mV (RMS) for a frequency deviation of 27 kHz and is ampliﬁed by 30 dB. By the use of a

DC operating point control circuit (with external capacitor CAF), the AF preampliﬁer is

decoupled from the PLL DC voltage. The low-pass characteristic of the ampliﬁer reduces

the harmonics of the 2nd SIF signal at the AF output terminal.

For FM sound a switchable de-emphasis network (with external capacitor) is implemented

between the preampliﬁer and the output ampliﬁer.

The AF output ampliﬁer provides the required AF output level by a rail-to-rail output stage.

A preceding stage makes use of an input selector for switching between FM sound,

AM sound and mute state. The gain can be switched between 10 dB (normal) and 4 dB

(reduced).

Switching to the mute state is controlled automatically, dependent on the digital

acquisition help in case the VCO of the FM PLL is not in the required frequency window.

This is done by a time constant: fast for switching to the mute state and slow (typically

40 ms) for switching to the no-mute state.

All switching functions are controlled via the I2C-bus:

• AM sound, FM sound and forced mute

• Auto mute enable or disable

• De-emphasis off or on with 50

µsor75 µs

• Audio gain normal or reduced

8.15 Internal voltage stabilizer

The band gap circuit internally generates a voltage of approximately 2.4 V, independent of

supply voltage and temperature. A voltage regulator circuit, connected to this voltage,

produces a constant voltage of 3.55 V which is used as an internal reference voltage.

8.16 I2C-bus transceiver and MAD

The device can be controlled via the 2-wire I2C-bus by a microcontroller. Two wires carry

serial data (SDA) and serial clock (SCL) information between the devices connected to

the I2C-bus.

The device has an I2C-bus slave transceiver with auto-increment. The circuit operates up

to clock frequencies of 400 kHz.

A slave address is sent from the master to the slave receiver. To avoid conﬂicts in a real

application with other devices providing similar or complementing functions, there are four

possible slave addresses available. These MADs can be selected by connecting resistors

on pin SIOMAD and/or pins SIF1 and SIF2 (see Figure 26). Pin SIOMAD relates with

bit A0 and pins SIF1 and SIF2 relate with bit A3. The slave addresses of this device are

given in Table 4.

The power-on preset value is dependent on the use of pin SIOMAD and can be chosen for

45.75 MHz NTSC as default (pin SIOMAD left open-circuit) or 58.75 MHz NTSC (resistor

on pin SIOMAD). In this way the device can be used without the I2C-bus as an NTSC only

device.

TDA9885T/V5 Datasheet(PDF) 13 Page - NXP Semiconductors

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