AT90USB646 datasheet(20/459 Pages) ATMEL

20 / 459 page

7593H–AVR–11/08

ATmega32U6/AT90USB64/128

128K program memory locations. The operation of Boot Program section and associated Boot

Lock bits for software protection are described in detail in “Memory Programming” on page 366.

“Memory Programming” on page 366 contains a detailed description on Flash data serial down-

loading using the SPI pins or the JTAG interface.

Constant tables can be allocated within the entire program memory address space (see the LPM

– Load Program Memory instruction description and ELPM - Extended Load Program Memory

instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 15.

Figure 5-1.

Program Memory Map

5.2

SRAM Data Memory

Figure 5-2 shows how the ATmega32U6/AT90USB64/128 SRAM Memory is organized.

The ATmega32U6/AT90USB64/128 is a complex microcontroller with more peripheral units than

can be supported within the 64 location reserved in the Opcode for the IN and OUT instructions.

For the Extended I/O space from $060 - $0FF in SRAM, only the ST/STS/STD and LD/LDS/LDD

instructions can be used.

The first 4,352/8,448 Data Memory locations address both the Register File, the I/O Memory,

Extended I/O Memory, and the internal data SRAM. The first 32 locations address the Register

file, the next 64 location the standard I/O Memory, then 160 locations of Extended I/O memory

and the next 4,096/8,192 locations address the internal data SRAM.

0x00000

Program Memory

Application Flash Section

Boot Flash Section

Flash End

AT90USB646 Datasheet(PDF) 20 Page - ATMEL Corporation