TC18C43 datasheet(2/7 Pages) TELCOM

2 / 7 page

4-94

TELCOM SEMICONDUCTOR, INC.

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage ............................................................ 18V

Maximum Chip Temperature ................................... 150

°C

Storage Temperature ............................ – 65

°C to +150°C

Lead Temperature (Soldering, 10 sec) ................. +300

°C

Package Thermal Resistance

CerDip RθJ-A ................................................ 150°C/W

CerDip RθJ-C .................................................. 55°C/W

PDIP RθJ-A ................................................... 125°C/W

PDIP RθJ-C ..................................................... 45°C/W

SOIC RθJ-A ................................................... 250°C/W

SOIC RθJ-C ..................................................... 75°C/W

Operating Temperature

18C4x ...................................... – 55C

° ≤ TA ≤ +125°C

28C4x ........................................ – 40C

° ≤ TA ≤ +85°C

38C4x ............................................. 0C

° ≤ TA ≤ +70°C

ELECTRICAL CHARACTERISTICS unless otherwise stated, these specifications apply over specific

temperature range. VIN = VDD = 15V; RT = 71 kΩ; CT = 150 pF.

TC18C43

TC28C43

TC38C43

Parameter

Test Conditions

Min

Typ

Max

Min

Typ

Max

Units

Reference Section

Output Voltage

TA = 25°C, IO = 1mA

4.9

5.1

4.90

5.10

Line Regulation

9.5V

≤ VIN ≤ 15V, IO = 1mA

—

±3

±10

—

±3

±10

Load Regulation

1mA

≤ lO ≤ 11mA

—

±5

±15

—

±3

±10

Temp Stability

(Note 1)

—

±0.25

±0.5

—

±0.25

±0.5

mV/

°C

Output Noise Voltage

10Hz

≤ f ≤ 10 kHz,TA = 25°C (Note 1)

—

100

—

100

—

µV(rms)

Long Term Stability

TA = 125°C, 1000 Hrs. (Note 1)

—

±0.5

—

±0.5

—

Output Short Circuit

-20

-50

-100

-30

-50

-100

Oscillator Section

Initial Accuracy

TA = 25°C (Note 4)

100

110

93.8

100

106.5

kHz

Voltage Stability

9.5V

≤ VIN ≤ 15V

—

±0.2

±0.3

—

±0.2

±0.3

Temp Stability

TMIN ≤ TA ≤ TMAX (Note 1); Figure 2

—

±0.01 ±0.05

—

±0.01

±0.03

°C

Clock Ramp Reset

RT/CT Pin at 4V

2.25

2.5

2.75

2.25

2.5

2.75

Amplitude

RT/CT Pin Peak to Peak

2.45

2.65

2.85

2.45

2.65

2.85

Maximum Freq

Note 1

—

MHz

Error Amp Section

Input Offset Voltage

V(CMPTR) = 2.5V

—

±15

±50

—

±15

±50

Input Bias Current

(Note 1)

—

±0.3

±2—

±0.3

±2nA

AVOL

≤ VO ≤ 4V

—

Gain Bandwidth Product

(Note 1)

650

750

—

650

750

—

kHz

PSRR

9.5V

≤ VIN ≤ 15V

100

—

100

—

Output Sink Current

VFB = 2.7V, V(CMPTR) = 1.1V (Note 1)

1.2

1.5

—

1.5

1.7

—

Output Source Current

VFB = 2.3V, V(CMPTR) = 5V (Note 1)

3.4

—

3.9

4.2

—

VOUT High

VFB = 2.3V, RL = 10k to Ground

5.65

6.5

5.65

6.5

VOUT Low

VFB = 2.7V, RL = 10k to VREF

0.1

0.7

1.1

0.1

0.7

1.1

Rise Response

Note 1

—

µsec

Fall Response

Note 1

—

µsec

Current Sense Section

Gain Ratio

Notes 2 & 3

2.8

2.9

3.1

2.8

2.9

3.1

V/V

Maximum Input Signal

V(CMPTR) = 5V (Note 2)

0.85

0.95

1.05

0.85

0.95

1.05

PSRR

9.5V

≤ VIN ≤ 15V (Notes 1, 2 & 5)

—

Input Bias Current

Note 1

—

±0.3

±2—

±0.3

±2nA

Delay to Output

V(ISENSE) = 1V (Note 1); Figure 3

—

140

160

—

140

150

nsec

TC18C43

TC28C43

TC38C43

BiCMOS CURRENT MODE

PWM CONTROLLERS

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