LTC1272-3CCSW datasheet(18/20 Pages) LINER

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LTC1272

1272fb

APPLICATI

I FOR ATIO

If the clock signal for the AD7572 is derived from a

separate crystal or other signal which is not synchronous

with the microprocessor clock, then the signals need to be

synchronized for the LTC1272 to achieve best analog

performance (see Clock and Control Synchronization).

The best way to synchronize these signals is to drive the

CLK IN pin of the LTC1272 with a derivative of the

processor clock, as mentioned above and shown in Figure

22. Another way, shown in Figure 23, is to use a flip-flop

to synchronize the RD to the LTC1272 with the CLK IN

signal. This method will work but has two disavantages

over the first: because the RD is delayed by the flip-flop,

the actual conversion start and the enabling of the

LTC1272’s BUSY and data outputs can take up to one CLK

IN cycle to respond to a RD

↓ convert command from the

processor. The sampling of the analog input no longer

occurs at the processor’s falling RD edge but may be

delayed as much as one CLK IN cycle. Although the

LTC1272 will still exhibit excellent DC performance, the

flip-flop will introduce jitter into the sampling which may

reduce the usefulness of this method for AC systems.

10 F

REF

D11 (MSB)

D10

CLK IN**

CLK OUT

HBEN

BUSY

LTC1272

DGND

D3/11

D2/10

D1/9

D0/8

AGND

✝

CONTROL

LINES

0.1 F

–15V

DATA

BUS

ANALOG INPUT

(0V TO 5V)

µF

0.1

µF

THE LTC1272 HAS THE SAME 0V TO 5V INPUT RANGE BUT PROVIDES A 2.42V

REFERENCE OUTPUT AS OPPOSED TO THE –5.25V OF THE AD7572. FOR PROPER

OPERATION, REVERSE THE REFERENCE CAPACITOR POLARITY AND SHORT OUT THE

RESISTOR.

Ω

THE ADC CLOCK SHOULD BE SYNCHRONIZED TO THE CONVERSION START

SIGNALS (CS, RD) OR 1-2 LSBs OF OUTPUT CODE NOISE MAY OCCUR. DERIVING

THE ADC CLOCK FROM THE P CLOCK IS ADEQUATE.

THE LTC1272 CAN ACCOMMODATE THE –15V SUPPLY OF THE AD7572 BUT DOES

NOT REQUIRE IT. PIN 23 OF THE LTC1272 IS NOT INTERNALLY CONNECTED.

LTC1272 • TA04

2.42V

OUTPUT

REF

Ω

10 F

0.1 F

✝

†

Figure 22. Plugging the LTC1272 into an AD7572 Socket

Case 1: Clock Synchronous with CS and RD

LTC1272-3CCSW Datasheet(PDF) 18 Page - Linear Technology

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