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LTC1642AIGN Datasheet(PDF) 7 Page - Linear Technology |
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LTC1642AIGN Datasheet(HTML) 7 Page - Linear Technology |
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7 / 16 page ![]() 7 LTC1642A 1642af OV (Pin 9): Overvoltage Input. When the voltage on OV exceeds its trip point the GATE pin is pulled low immedi- ately and the CRWBR timer starts. If OV remains above its trip point (minus 3mV of hysteresis) long enough for CRWBR to reach its trip point, then the part turns off until reset by pulsing the ON pin low. Otherwise, the GATE pin begins ramping up one RST TMR timing cycle after OV goes below its trip point. Ground the OV pin to disable overvoltage protection. COMPOUT (Pin 10): Uncommitted Comparator’s Open Drain Output. COMP + (Pin 11): Uncommitted Comparator’s Noninvert- ing Input. COMP – (Pin 12): Uncommitted Comparator’s Inverting Input. REF (Pin 13): Reference Voltage Output. The 1.22V ±1% reference should be bypassed with a 0.1 µF compensation capacitor. For VCC = 5V it can source 1mA. GATE (Pin 14): Gate Drive for the External N-Channel MOSFET. An internal charge pump provides at least 4.5V of gate drive and sources 25 µA. The pin requires an external series RC network to ground to compensate the current limit loop and to limit the ramp rate. A resistor of 100 Ω is also recommended in series with the MOSFET gate to suppress high frequency oscillations. GATE is PI FU CTIO S immediately pulled to ground when the overvoltage com- parator trips or the input supply is below the undervoltage lockout trip point. During current limit the GATE voltage is adjusted to maintain constant load current until the circuit breaker timer trips. At that point GATE is pulled to ground until the chip is reset. Clamp the GATE pin with a zener diode to ground if the supply is 8V or higher. For the 8V to 12V range use an 18V zener (1N4705), and for supplies exceeding 12V use a 20V zener (TOSHIBA 02DZ20Y). SENSE (Pin 15): Current Sense Input. To use the current limit place a sense resistor in the supply path between VCC and SENSE. When the drop across the resistor exceeds a threshold voltage, the GATE pin is adjusted to maintain a constant load current and the circuit breaker timer is started. A foldback feature reduces the current limit as the voltage at FB approaches ground. Short SENSE to VCC to disable the current limiting. VCC (Pin 16): Positive Supply Voltage. An internal under- voltage lockout circuit holds the GATE pin at ground until VCC exceeds 2.73V. If VCC exceeds 16.5V an internal shunt regulator protects the chip from VCC and SENSE pin voltages up to 33V. In this case the GATE pin voltage will usually be low but this is not guaranteed; use the OV pin to ensure that the pass device is off. The VCC pin also provides a high side connection to the SENSE resistor. |
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