LTC1642AIGN datasheet(14/16 Pages) LINER

14 / 16 page

LTC1642A

1642af

APPLICATIO S I FOR ATIO

The undervoltage monitor behaves differently if FB is

above its threshold when the GATE begins ramping:

RESET goes high as soon as the GATE ramp begins.

RESET goes low immediately if VCC falls below the chip’s

2.5V internal undervoltage lockout threshold.

To disable the undervoltage monitor, tie FB to REF and

ground RESET.

1N4705

18V

GATE

SENSE

RESET

VCC

0.015

Ω

FDS6630A

GND

LTC1642A

RST TMR

1642a F12

100

Ω

330

Ω

0.047

µF

95.3k

12.4k

0.33

µF

ALL RESISTORS

±5% UNLESS NOTED.

FB COMPARATOR TRIPS AT VOUT = 10.7V

VIN

12V

2.5A

VOUT

CLOAD

Figure 12. Undervoltage Monitoring Circuitry

Figure 13. Supply Monitor Waveforms

REFERENCE CURRENT

100

µA

1mA

10mA

1642a F14

0.1

0.2

0.4

1.0

2.0

4.0

10.0

Figure 14. Minimum REF Compensation vs REF Current

Reference

The LTC1642A’s internal voltage reference is buffered and

brought out to the REF pin. The buffer amplifier should be

compensated with a capacitor connected between REF

and ground. If no DC current is drawn from REF, 0.1

µF

ensures an adequate phase margin, but the minimum

compensation increases if REF sources a substantial DC

current, as shown in Figure 14.

t2 t3

250ms/DIV

1642a F13

VIN

20V/DIV

VRSTTMR

1V/DIV

VRESET

10V/DIV

LTC1642AIGN Datasheet(PDF) 14 Page - Linear Technology

LTC1642AIGN Datasheet(HTML) 14 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL