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LTM4606MPV Datasheet(PDF) 10 Page - Linear Technology

Part # LTM4606MPV
Description  Ultralow EMI 28VIN, 6A DC/DC 關Module
PDF  24 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4606MPV Datasheet(HTML) 10 Page - Linear Technology

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LTM4606
10
4606f
The typical LTM4606 application circuit is shown in
Figure 20. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 2 for specific external capacitor
requirements for a particular application.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN and VOUT step-
down ratio that can be achieved for a given input voltage.
These constraints are caused by the limitation of the
minimum on and off time in the internal switches. Refer
to the Frequency Adjustment section to change the switch-
ing frequency and get wider input and output ranges. See
the Thermal Considerations and Output Current Derating
section in this data sheet for the current restrictions.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects the VOUT and VFB pins together. Adding
a resistor RFB from the VFB pin to the SGND pin programs
the output voltage:
VV
kR
R
OUT
FB
FB
=
+
06
60 4
.
.
Table 1. RFB Standard 1% Resistor Values vs VOUT
RFB
(kΩ)
Open
60.4
40.2
30.1
25.5
19.1
13.3
8.25
VOUT
(V)
0.6
1.2
1.5
1.8
2
2.5
3.3
5
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
RPGM resistor on the MPGM pin programs the current.
Calculate VOUT(MARGIN):
V
V
V
OUT MARGIN
OUT
OUT
()
%
•
=
100
where %VOUTisthepercentageofVOUTyouwanttomargin,
and VOUT(MARGIN) is the margin quantity in volts:
R
V
V
V
V
k
PGM
OUT
OUT MARGIN
=
06
118
10
.
•
.
•
()
APPLICATIONS INFORMATION
where RPGM is the resistor value to place on the MPGM
pin to ground.
The output margining will be ± margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
MARG1
MARG0
MODE
LOW
LOW
NO MARGIN
LOW
HIGH
MARGIN UP
HIGH
LOW
MARGIN DOWN
HIGH
HIGH
NO MARGIN
Input Capacitors and Input EMI Noise Attenuation
The LTM4606 is designed to achieve the low input con-
ducted EMI noise due to the fast switching of turn-on
and turn-off. In the LTM4606, a high frequency inductor
is integrated to the input line for noise attenuation. VD
and VIN pins are available for external input capacitors to
form a high frequency ∏ filter. As shown in Figure 19, the
ceramic capacitor C1 on the VD pins is used to handle most
of the RMS current into the converter, so careful attention
is needed for capacitor C1 selection.
For a buck converter, the switching duty-cycle can be
estimated as:
D
V
V
OUT
IN
=
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
I
I
DD
CIN RMS
OUT MAX
()
()
••
–
=
()
η
1
In the above equation,
η is the estimated efficiency of the
power module. Note the capacitor ripple current ratings
are often based on temperature and hours of life. This
makes it advisable to properly derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
In a typical 6A output application, one or two very low
ESR X5R or X7R, 10μF ceramic capacitors are recom-
mended for C1. This decoupling capacitor should be placed



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