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LTC4213

4213f

APPLICATIO S I FOR ATIO

Figure 5. Load Supply Power-Up Before VCC

VON > 0.8V

Vth

VCC, VON

CIRCUIT BREAKER ARMS

READY SIGNALS

VREADY

VSENSEN

VSENSEP

RESET MODE

NORMAL CYCLE

tREADY

STARTUP CYCLE

tDEBOUNCE

VGATE

4213 F05

VSENSEP – VSENSEN = VCB

VGATE MAXES OUT

VCC > 2.07V

∆VGSARM + VSENSEN

∆VGSMAX + VSENSEN

Load Supply Power-Up Before VCC

Referring back to Figure 1, the VIN load supply can also be

powered up before VCC. Figure 5 shows the timing dia-

gram with the VIN load supply active initially. An internal

circuit ensures that the GATE pin is held low. At time point

1, VCC clears UVLO and at time point 2, ON clears 0.8V.

60µs later at time point 3, the GATE is ramped up with

100µA. At time point 4, GATE reaches the external MOSFET

threshold VTH and VOUT starts to ramp up. At time point 5,

VSENSEN is near its peak. At time point 6, the circuit breaker

is armed and the circuit breaker can trip if ∆VSENSE > VCB.

At time point 7, the GATE voltage peaks. 50µs after time

point 6, READY goes HIGH.

Startup Problems

There is no current limit monitoring during output charg-

ing for the figure 5 power-up sequence where the load

supply is powered up before VCC. This is because the GATE

voltage is below ∆VGSARM and the MOSFET may not reach

the specified RDSON. The VIN load supply should have

sufficient capability to handle the inrush as the output

charges up. For proper startup, the final load at time

LTC4213IDDB Datasheet(PDF) 16 Page - Linear Technology

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