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SN74ALS233B Datasheet(PDF) 6 Page - Texas Instruments |
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SN74ALS233B Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 8 page ![]() SN74ALS233B 16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS253B – MARCH 1990 – REVISED APRIL 1998 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) MIN NOM MAX UNIT f lk Clock frequency LDCK 40 MHz fclock Clock frequency UNCK 40 MHz RST low 18 LDCK low 15 tw Pulse duration LDCK high 10 ns UNCK low 15 UNCK high 10 Data before LDCK ↑ 8 tsu Setup time RST (inactive) before LDCK ↑ 5 ns LDCK (inactive) before RST ↑ 5 th Hold time Data after LDCK ↑ 5 ns switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX UNIT fmax LDCK, UNCK 40 MHz t d LDCK ↑ Any Q 6 32 ns tpd UNCK ↑ Any Q 6 30 ns tPLH LDCK ↑ EMPTY 5 25 ns tPHL UNCK ↑ EMPTY 6 27 ns tPHL RST ↓ EMPTY 5 25 ns t d LDCK ↑ EMPTY 1 7 34 ns tpd UNCK ↑ EMPTY+1 7 34 ns tPLH RST ↓ EMPTY+1 8 31 ns t d LDCK ↑ FULL 1 9 33 ns tpd UNCK ↑ FULL–1 8 32 ns tPLH RST ↓ FULL–1 11 32 ns tPHL LDCK ↑ FULL 6 27 ns tPLH UNCK ↑ FULL 5 25 ns tPLH RST ↓ FULL 9 30 ns ten OE ↑ Q 2 15 ns tdis OE ↓ Q 1 15 ns |
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