SN74ALVC7813

64

× 18

LOW-POWER CLOCKED FIRST-IN, FIRST-OUT MEMORY

SCAS594A – OCTOBER 1997 – REVISED APRIL 1998

11

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VOH

VOL

th

tsu

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT FOR OUTPUTS

S1

6 V

Open

GND

500

Ω

500

Ω

tPLH

tPHL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 6 V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

tPZL

tPZH

tPLZ

tPHZ

1.5 V

1.5 V

1.5 V

1.5 V

3 V

0 V

1.5 V

1.5 V

VOH

VOL

0 V

1.5 V

VOL + 0.3 V

1.5 V

VOH – 0.3 V

0 V

1.5 V

3 V

0 V

1.5 V

1.5 V

0 V

3 V

0 V

1.5 V

1.5 V

tw

Input

(see Note C)

3 V

3 V

3 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Timing

Input

Data

Input

Output

Input

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

tPHL/tPLH

tpd

tPZH

tPZL

tPHZ

tPLZ

GND

6 V

GND

6 V

PARAMETER

S1

ten

tdis

Open

Figure 5. Standard CMOS Outputs (FULL, EMPTY, HF, AF/AE)