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TMS320UC5409 Datasheet(PDF) 12 Page - Texas Instruments |
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TMS320UC5409 Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 74 page ![]() TMS320UC5409 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS101A – APRIL 1999 – REVISED AUGUST 1999 12 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 extended program memory The ’UC5409 uses a paged extended memory scheme in program space to allow access of up to 8M program memory locations. In order to implement this scheme, the ’UC5409 includes several features that are also present on the ’548/’549 devices: D Twenty-three address lines, instead of sixteen D An extra memory-mapped register, the XPC register defines the page selection. This register is memory-mapped into data space to address 001Eh. At a hardware reset, the XPC is initialized to 0. D Six extra instructions for addressing extended program space. These six instructions affect the XPC. – FB[D] pmad (23 bits) – Far branch – FBACC[D] Accu[22:0] – Far branch to the location specified by the value in accumulator A or accumulator B – FCALL[D] pmad (23 bits) – Far call – FCALA[D] Accu[22:0] – Far call to the location specified by the value in accumulator A or accumulator B – FRET[D] – Far return – FRETE[D] – Far return with interrupts enabled D In addition to these new instructions, two ’54x instructions are extended to use 23 bits in the ’UC5409: – READA data_memory (using 23-bit accumulator address) – WRITA data_memory (using 23-bit accumulator address) All other instructions, software interrupts, and hardware interrupts do not modify the XPC register and access only memory within the current page. Program memory in the ’UC5409 is organized into 127 pages that are each 64K in length, as shown in Figure 2. 00 0000 Internal 32K Page 0 1 0000 1 7FFF Page 1 Lower 32K† External 2 0000 2 7FFF Page 2 Lower 32K† External . . . . . . 7F 0000 7F 7FFF Page 127 Lower 32K† External 0 FFFF 32K External 1 8000 1 FFFF Page 1 Upper 32K External 2 8000 2 FFFF Page 2 Upper 32K External . . . . . . 7F 8000 7F FFFF Page 127 Upper 32K External † The lower 32K words of pages 1 through 126 are available only when the OVLY bit is cleared to 0. If the OVLY bit is set to 1, the on-chip RAM is mapped to the lower 32K words of all program space pages. Figure 2. Extended Program Memory |
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