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TLV2475CDR Datasheet(PDF) 15 Page - Texas Instruments |
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TLV2475CDR Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 41 page ![]() TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600− µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION _ + Rnull RL CL Figure 41 APPLICATION INFORMATION driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 42. A minimum value of 20 Ω should work well for most applications. CLOAD RF Input Output RG RNULL _ + Figure 42. Driving a Capacitive Load offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: V OO + V IO 1 ) R F R G " I IB ) R S 1 ) R F R G " I IB– R F + - VI + RG RS RF IIB- VO IIB+ Figure 43. Output Offset Voltage Model |
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