TMS418160A

1048576 BY 16-BIT

DYNAMIC RANDOM-ACCESS MEMORY

SMKS891C – AUGUST 1996 – REVISED OCTOBER 1997

7

POST OFFICE BOX 1443

electrical characteristics over recommended ranges of supply voltage and ambient temperature

(unless otherwise noted)

PARAMETER

TEST CONDITIONS†

’418160A - 50

’418160A - 60

’418160A - 70

UNIT

PARAMETER

TEST CONDITIONS†

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

VOH

High-level output

voltage

IOH = – 5 mA

2.4

2.4

2.4

V

VOL

Low-level output voltage

IOL = 4.2 mA

0.4

0.4

0.4

V

II

Input current (leakage)

VDD = 5.5 V,

VI = 0 V to 6.5 V,

All others = 0 V to VDD

± 10

± 10

± 10

µA

IO

Output current (leakage)

VDD = 5.5 V,

VO = 0 V to VDD,

xCAS high

± 10

± 10

± 10

µA

ICC1‡§

Average read- or

write-cycle current

VDD = 5.5 V,

Minimum cycle

180

160

150

mA

ICC2

Average standby current

VIH = 2.4 V ( TTL),

After one memory cycle,

RAS and xCAS high

2

2

2

mA

ICC2

Average standby current

VIH = VDD – 0.2 V (CMOS),

After one memory cycle,

RAS and xCAS high

1

1

1

mA

ICC3§

Average refresh current

(RAS-only refresh or

xCBR)

VDD = 5.5 V,

Minimum cycle,

RAS cycling,

xCAS high

(RAS only),

RAS low after xCAS low (xCBR)

180

160

150

mA

ICC4ঠAverage page current

VDD = 5.5 V,

tPC = MIN,

RAS low,

xCAS cycling

110

90

80

mA

† For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements.

‡ Measured with outputs open

§ Measured with a maximum of one address change while RAS = VIL

¶ Measured with a maximum of one address change during each page cycle, tPC

capacitance

over recommended ranges of supply voltage and ambient temperature,

f = 1 MHz (see Note 3)

PARAMETER

MIN

MAX

UNIT

Ci(A)

Input capacitance, A0 – A9

5

pF

Ci(OE)

Input capacitance, OE

7

pF

Ci(RC)

Input capacitance, xCAS and RAS

7

pF

Ci(W)

Input capacitance, W

7

pF

CO

Output capacitance#

7

pF

# LCAS and UCAS = VIH to disable outputs