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PCS2I9942C Datasheet(PDF) 5 Page - PulseCore Semiconductor

Part # PCS2I9942C
Description  Low Voltage 1:18 Clock Distribution Chip
PDF  10 Pages
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Manufacturer  PULSECORE [PulseCore Semiconductor]
Direct Link  http://www.onsemi.com/
Logo PULSECORE - PulseCore Semiconductor

PCS2I9942C Datasheet(HTML) 5 Page - PulseCore Semiconductor

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September 2006
PCS2I9942C
rev 0.3
Low Voltage 1:18 Clock Distribution Chip
5 of 10
Notice: The information in this document is subject to change without notice.
Power Consumption of the PCS2I9942C and
Thermal Management
The PCS2I9942C AC specification is guaranteed for the
entire operating frequency range up to 250MHz. The
PCS2I9942C power consumption and the Pcssociated
long-term reliability may decrePcse the maximum
frequency limit, depending on operating conditions such
Pcs clock frequency, supply voltage, output loading,
ambient temperature, vertical convection and thermal
conductivity of package and board. This section
describes the impact of these parameters on the junction
temperature and gives a guideline to estimate the
PCS2I9942C
die
junction
temperature
and
the
Pcssociated device reliability.
Table 8. Die junction temperature and MTBF
Junction temperature (°C)
MTBF (Years)
100
20.4
110
9.1
120
4.2
130
2.0
IncrePcsed power consumption will increPcse the die
junction temperature and impact the device reliability
(MTBF). According to the system-defined tolerable
MTBF, the die junction temperature of the PCS2I9942C
needs to be controlled and the thermal impedance of the
board/package
should
be
optimized.
The
power
dissipated in the PCS2I9942C is represented in
equation1.
Where ICCQ is the static current consumption of the
PCS2I9942C, CPD is the power dissipation capacitance
per output,
(Μ)ΣCL represents the external capacitive
output load, N is the number of active outputs (N is
always 12 in cPcse of the PCS2I9942C). The
PCS2I9942C supports driving transmission lines to
maintain high signal integrity and tight timing parameters.
Any transmission line will hide the lumped capacitive load
at the end of the board trace, therefore,
ΣCL is zero for
controlled transmission line systems and can be
eliminated from equation 1. Using parallel termination
output termination results in equation 2 for power
dissipation.
In equation 2, P stands for the number of outputs with a
parallel or thevenin termination. VOL, IOL, VOH and IOH are
a function of the output termination technique and DCQ is
the clock signal duty cycle. If transmission lines are used
ΣCL is zero in equation 2 and can be eliminated. In
general, the use of controlled transmission line
techniques eliminates the impact of the lumped capacitive
loads at the end lines and greatly reduces the power
dissipation of the device. Equation 3 describes the die
junction temperature TJ Pcs a function of the power
consumption.
Where Rthja is the thermal impedance of the package
(junction to ambient) and TA is the ambient temperature.
According to Table 8, the junction temperature can be
used to estimate the long-term device reliability. Further,
combining equation 1 and equation 2 results in a
maximum operating frequency for the PCS2I9942C in a
series terminated transmission line system, equation 4.



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