DAC7568C datasheet(39/58 Pages) TI

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POWER-DOWN MODES

DAC Power-Down Commands

OUT

Amplifier

Resistor

String

DAC

Power-Down

Circuitry

Resistor

Network

DAC7568

DAC8168

DAC8568

www.ti.com ..................................................................................................................................................... SBAS430A – JANUARY 2009 – REVISED APRIL 2009

DACs. However, for the three power-down modes,

the supply current falls to 0.18

µA at 5.5V (0.10µA at

The DAC7568, DAC8168, and DAC8568 have two

3.6V). Not only does the supply current fall, but the

separate sets of power-down commands. One set is

output stage also switches internally from the output

for the DAC channels and the other set is for the

of the amplifier to a resistor network of known values.

internal reference. For more information on powering

down the reference, see the Enable/Disable Internal

The advantage of this switching is that the output

Reference section.

impedance of the device is known while it is in

power-down mode. As described in Table 11, there

are three different power-down options. VOUT can be

connected internally to GND through a 1k

Ω resistor, a

The DAC7568, DAC8168, and DAC8568 use four

100k

Ω resistor, or open circuited (High-Z). The output

modes of operation. These modes are accessed by

stage is shown in Figure 124. In other words, DB27,

setting control bits C3, C2, C1, and C0, and

DB26, DB25, and DB24 = '0100' and DB9 and DB8 =

power-down register bits DB8 and DB9. The control

'11' represent a power-down condition with High-Z

bits must be set to '0100'. Once the control bits are

output impedance for a selected channel. DB9 and

set correctly, the four different power down modes

DB8 = '01' represents a power-down condition with

are software programmable by setting bits DB8 and

Ω

output

impedance,

and

'10'

represents

DB9 in the control register. Table 10 and Table 11

power-down condition with 100k

Ω output impedance.

shows how to control the operating mode with data

bits PD0 (DB8), and PD1 (DB9).

Table 11. DAC Operating Modes

PD1

PD0

(DB9)

(DB8)

DAC OPERATING MODES

Power up selected DACs

Power down selected DACs 1k

Ω to GND

Power down selected DACs 100k

Ω to GND

Power down selected DACs High-Z to GND

The DAC7568, DAC8168, and DAC8568 treat the

power-down condition as data; all the operational

Figure 124. Output Stage During Power-Down

modes are still valid for power-down. It is possible to

broadcast

power-down

condition

all

the

All analog channel circuits are shut down when the

DAC8568, DAC8168, DAC7568s in a system. It is

power-down

mode

exercised.

However,

the

also possible to power-down a channel and update

contents of the DAC register are unaffected when in

data on other channels. Furthermore, it is possible to

power down. By setting both bits, DB8 and DB9, to

write to the DAC register/buffer of the DAC channel

different values, any combination of DAC channels

that is powered down. When the DAC channel is then

can be powered down or powered up. If a DAC

powered up, it will power up to this new value (see

channel is being powered up from a previously power

the Operating Examples section).

down situation, this DAC channel powers up to the

When both the PD0 and PD1 bits are set to '0', the

value in its DAC register. The time required to exit

device

works

normally

with

its

typical

current

power-down is typically 2.5

µs for AV

DD = 5V, and 4µs

consumption of 1.25mA at 5.5V. The reference

for AVDD = 3V. See the Typical Characteristics for

current is included with the operation of all eight

more information.

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DAC7568C Datasheet(PDF) 39 Page - Texas Instruments

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