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SSL3250A Datasheet(PDF) 18 Page - NXP Semiconductors |
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SSL3250A Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 26 page ![]() SSL3250A_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 30 June 2009 18 of 26 NXP Semiconductors SSL3250A Photo flash dual LED driver maintaining loop stability. The SSL3250A overvoltage limit on VO is 10.3 V (typ). The rated voltage of the output capacitor should be at least 16 V. For solution size reasons lower value ceramic capacitors could be placed in parallel. 9.3 Inductor The device has been designed to operate well with inductance values between 1.5 µH and 3.3 µH, in order to optimize for solution size. In a typical high current dual flash LED application a 2.2 µH inductance is recommended. The inductors saturation current should be greater than or equal to the inductor peak current limiter current, which is typical 2.2 A. During normal operation, it is recommended to keep the inductor peak current below this value. The copper losses and magnetic hysteresis losses in the inductor also contribute to the total system losses. 9.4 Rectifier diode Selecting a Schottky diode with low forward voltage drop improves efficiency. Although the average current through the diode is equal to the load current and independent on duty cycle for a boost converter topology, it is recommended to select a diode with an average current rating that is significantly higher. The peak current rating of the diode should be greater than the peak current through the inductor. 9.5 PCB layout It is essential to have a good circuit layout to maximize efficiency and minimize EMI disturbance. Because the circuit topology uses an inductor, it is often appointed as a main source for EMI disturbance. But any loop of wire carrying a current is essentially an electromagnet with a field strength that is proportional to the current. Therefore careful circuit layout is important, keeping loop areas small and minimizing magnetic flux. Due to the way an asynchronous boost converter operates, there are two power states. One state is when the internal NMOS switch is on and one when the NMOS switch is off. During each state there will be a current loop made by the power components that are conducting. Arrange the input capacitor, rectifier diode and output capacitor in such a way around the SSL3250A that during each of the two states the current loop is conducting in the same direction. This prevents phase reversal of the magnetic field and reduces radiated EMI. The current loop area should be kept small by placing the power components as close as possible to the SSL3250A. Use ground planes to keep loop areas to a minimum. Priority should be given to positioning the output capacitor and the rectifier diode as close as possible to the LX and PGND nodes of the SSL3250A. Since large currents will flow from the input capacitor to the inductor and not into the VIN pin of the SSL3250A, it is wise to locate the input capacitor near the inductor. The VIN pin should be star connected to the positive pad of the input capacitor. It is recommended to place an extra 100 nF capacitor from VIN to GND directly next to the SSL3250A. PGND and GND of the SSL3250A should be directly connected to each other preferably by using the die pad area under the SSL3250A. Place the ground connection of the output capacitor as close as possible to the PGND pin of the SSL3250A. |
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