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TDF8599B Datasheet(PDF) 23 Page - NXP Semiconductors |
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TDF8599B Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 54 page ![]() TDF8599B_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 29 July 2009 23 of 54 NXP Semiconductors TDF8599B I2C-bus controlled dual channel class-D power amplifier 9. I2C-bus specification TDF8599B address with hardware address select. [1] Required external resistor accuracy is 1 %. [2] Short circuited to ground. In I2C-bus mode, pins MOD and ADS can be latched using the I2C-bus command IB3[D7] = 1. This avoids disturbances from amplifier outputs of other TDF8599B devices in the same application switching and generating incorrect information on the MOD and ADS pins. (1) Shutdown hold delay. (2) Shutdown delay. (3) Master mode shutdown delay. Fig 21. Start-up and shutdown timing in non-I2C-bus mode 001aai791 VDDA DIAG EN td(2) td(1) td(3) td(stb-mute) ACGND SEL_MUTE SVRR OUTn td(mute-fgain) Table 13. I2C-bus write address selection using pins MOD and ADS RADS[1] (kΩ) RMOD[1] (kΩ) R/W Stereo mode Parallel mode 0[2] 4.7 13 33 100 open Open 58h 68h 78h 58h 68h 78h 1 = Read from TDF8599B 0 = Write to TDF8599B 100 56h 66h 76h 56h 66h 76h 33 54h 64h 74h 54h 64h 74h 13 52h 62h 72h 52h 62h 72h 4.7 50h 60h 70h 50h 60h 70h 0[2] non-I2C-bus mode select |
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