SH7280 Group

MTU2: Output of Complementary Pairs of PWM Signals in Three Phases

(Complementary PWM Mode)

REJ06B0887-0100/Rev.1.00

June 2009

Page 7 of 24

2.2

Operation of the Sample Program

2.2.1

Settings for Operation of the Sample Program

In this sample program, the output of complementary PWM waveforms in three phases on channels 3 and 4 of MTU2 is

obtained by selecting complementary PWM mode 3. An output level is also toggled in synchronization with the PWM

carrier cycle. Table 3 gives the setting conditions for operation in complementary PWM mode in this sample program.

Figure 4 shows a sample of output waveforms in complementary PWM mode.

Table 3

Setting for Operation in Complementary PWM Mode

Item

Description

Channels in use

3 and 4

Operating mode

Complementary PWM mode 3 (data transfer at the crest and trough of the

counter value)

Functions of pins

• TIOC3A pin: Output toggled in synchronization with the PWM cycle

• TIOC3B pin: PWM output 1 (positive waveform)

• TIOC3D pin: PWM output 1' (inverse waveform for PWM output 1)

• TIOC4A pin: PWM output 2 (positive waveform)

• TIOC4C pin: PWM output 2' (inverse waveform for PWM output 2)

• TIOC4B pin: PWM output 3 (positive waveform)

• TIOC4D pin: PWM output 3' (inverse waveform for PWM output 3)

Active level

• Output of positive signal: Active low

• Output of inverse signal: Active low

Counter clock

10 MHz (Obtained by dividing P

φ clock frequency by 4)

PWM carrier cycle

400

μs (carrier frequency: 2.5 kHz)

Short-circuit prevention

interval (dead time)

4

μs

PWM duty cycle

• Initial duty cycle for PWM outputs 1, 2, 3: 50%

PWM duty cycle value is updated every time the TGRA_3 interrupt is

generated (setting is incremented or decremented).

Interrupt

• Compare match interrupt for TGRA_3

A TGRA_3 compare match is generated once per PWM-carrier cycle.

TIOC3A pin

(Toggled output)

TIOC3B pin

(PWM output 1, positive)

TIOC3D pin

(PWM output 1', inverse)

TIOC4A pin

(PWM output 2, positive)

TIOC4C pin

(PWM output 2', inverse)

TIOC4B pin

(PWM output 3, positive)

TIOC4D pin

(PWM output 3', inverse)

1

0

PWM carrier cycle

PWM carrier cycle

Short-circuit

prevention interval

1

0

1

0

1

0

1

0

1

0

1

0

Short-circuit

prevention interval

PWM waveform outputs are active low level (for both phases of each pair).

: Active level (low)

Figure 4 Output Waveforms in Complementary PWM Mode Operation