XRT75R12IB datasheet(13/90 Pages) EXAR

13 / 90 page

XRT75R12

REV. 1.0.4

TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

GENERAL CONTROL PINS

PIN #

SIGNAL NAME

TYPE

DESCRIPTION

TEST

****

Factory Test Mode Input Pin

This pin must be connected to GND for normal operation.

NOTE: This input pin is internally pulled "Low".

AE25

TRST

Test Reset

Test Boundary Scan

AB23

TMS

Test Mode Select

Test Boundary Scan

AB5

TCK

Test Clock

Test Boundary Scan

AB4

TDI

Test Data Input

Test Boundary Scan

AE2

TDO

Test Data Output

Test Boundary Scan

MICROPROCESSOR PARALLEL INTERFACE -

PIN #

SIGNAL NAME

TYPE

DESCRIPTION

J26

Pmode

This pin controls the Microprocessor Parallel Interface mode.

"High" sets a Synchronous clocked interface mode with a clock from the Host.

"Low" sets an Asynchronous mode where a clock internal to the XRT75R12 will

time the operations.

P24

PCLK

High speed clock supplied by the Host to provide timing in the Synchronous

Interface mode. This signal must be a square-wave.

N24

Chip Select Input (active low)

Initiates a read or write operation. When "High", no parallel communication is

active between the LIU and the Host.

N22

Write Input (active low)

Enables the Host to write data D[7:0] into the LIU register space at address

Addr[7:0].

N23

Read Input (active low)

Commands the LIU to transfer the contents of a register specified by Addr[7:0] to

the Host.

N25

RDY

Ready Line Output (active low)

Provides a handshake between the LIU and the Host that communicates when

an operation has been completed.

NOTE: This pin must be pulled "High" with a 3k

Ω ± 1% resistor.

XRT75R12IB Datasheet(PDF) 13 Page - Exar Corporation

XRT75R12IB Datasheet(HTML) 13 Page - Exar Corporation

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