MCP3422 datasheet(28/58 Pages) MICROCHIP

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MCP3422/3/4

DS22088C-page 28

High Speed Mode (3.4 MHz)

Clock frequency

fSCL

0—

3.4

MHz

Cb = 100 pF

0—

1.7

MHz

Cb = 400 pF

Clock high time

THIGH

—

Cb = 100 pF, fSCL = 3.4 MHz

120

—

Cb = 400 pF, fSCL = 1.7 MHz

Clock low time

TLOW

160

—

Cb = 100 pF, fSCL = 3.4 MHz

320

—

Cb = 400 pF, fSCL = 1.7 MHz

SCL rise time

(Note 1)

—

From VIL to VIH,

Cb = 100 pF, fSCL = 3.4 MHz

—

From VIL to VIH,

Cb = 400 pF, fSCL = 1.7 MHz

SCL fall time

(Note 1)

—

From VIH to VIL,

Cb = 100 pF, fSCL = 3.4 MHz

—

From VIH to VIL,

Cb = 400 pF, fSCL = 1.7 MHz

SDA rise time

(Note 1)

TR: DAT

—

From VIL to VIH,

Cb = 100 pF, fSCL = 3.4 MHz

—

160

From VIL to VIH,

Cb = 400 pF, fSCL = 1.7 MHz

SDA fall time

(Note 1)

TF: DATA

—

From VIH to VIL,

Cb = 100 pF, fSCL = 3.4 MHz

—

160

From VIH to VIL,

Cb = 400 pF, fSCL = 1.7 MHz

Data hold time

(Note 4)

THD:DAT

—

Cb = 100 pF, fSCL = 3.4 MHz

—

150

Cb = 400 pF, fSCL = 1.7 MHz

Output valid from clock

(Notes 2 and 3)

TAA

—

150

Cb = 100 pF, fSCL = 3.4 MHz

—

310

Cb = 400 pF, fSCL = 1.7 MHz

START condition hold time

THD:STA

160

—

After this period, the first clock

pulse is generated

START (Repeated) condition

setup time

TSU:STA

160

—

Data input setup time

TSU:DAT

—

STOP condition setup time

TSU:STO

160

—

TABLE 5-4:

I2C SERIAL TIMING SPECIFICATIONS (CONTINUED)

Electrical Specifications: Unless otherwise specified, all limits are specified for TA = -40 to +85°C, VDD = +2.7V to +5.0V,

VSS = 0V, CHn+ = CHn- = VREF/2.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Note

This parameter is ensured by characterization and not 100% tested.

This specification is not a part of the I2C specification. This specification is equivalent to the Data Hold Time (THD:DAT)

plus SDA Fall (or rise) time: TAA = THD:DAT + TF (OR TR).

If this parameter is too short, it can create an unintended Start or Stop condition to other devices on the bus line. If this

parameter is too long, Clock Low time (TLOW) can be affected.

For Data Input: If this parameter is too long, the Data Input Setup (TSU:DAT) or Clock Low time (TLOW) can be affected.

For Data Output: This parameter is characterized, and tested indirectly by testing TAA parameter.

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