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MCP1415RT Datasheet(PDF) 12 Page - Microchip Technology |
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MCP1415RT Datasheet(HTML) 12 Page - Microchip Technology |
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12 / 20 page ![]() MCP1415/16 DS22092C-page 12 © 2008 Microchip Technology Inc. 4.4 Power Dissipation The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements. EQUATION 4-1: 4.4.1 CAPACITIVE LOAD DISSIPATION The power dissipation caused by a capacitive load is a direct function of the frequency, total capacitive load, and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET is shown in Equation 4-2. EQUATION 4-2: 4.4.2 QUIESCENT POWER DISSIPATION The power dissipation associated with the quiescent current draw depends upon the state of the input pin. The MCP1415/16 devices have a quiescent current draw when the input is high of 0.65 mA (typical) and 0.1 mA (typical) when the input is low. The quiescent power dissipation is shown in Equation 4-3. EQUATION 4-3: 4.4.3 OPERATING POWER DISSIPATION The operating power dissipation occurs each time the MOSFET driver output transitions because for a very short period of time both MOSFETs in the output stage are on simultaneously. This cross-conduction current leads to a power dissipation describe in Equation 4-4. EQUATION 4-4: 4.5 PCB Layout Considerations Proper PCB layout is important in high current, fast switching circuits to provide proper device operation and robustness of design. Improper component placement may cause errant switching, excessive voltage ringing, or circuit latch-up. PCB trace loop area and inductance must be minimized. This is accomplished by placing the MOSFET driver directly at the load and placing the bypass capacitor directly at the MOSFET driver (Figure 4-3). Locating ground planes or ground return traces directly beneath the driver output signal also reduces trace inductance. A ground plane will also help as a radiated noise shield as well as providing some heat sinking for power dissipated within the device (Figure 4-4). FIGURE 4-3: Recommended PCB Layout (TOP). FIGURE 4-4: Recommended PCB Layout (BOTTOM). P T P L P Q P CC ++ = Where: PT = Total power dissipation PL = Load power dissipation PQ = Quiescent power dissipation PCC = Operating power dissipation P L fC T × V DD 2 × = Where: f = Switching frequency CT = Total load capacitance VDD = MOSFET driver supply voltage P Q I QH DI QL 1 D – () × + × () V DD × = Where: IQH = Quiescent current in the high state D = Duty cycle IQL = Quiescent current in the low state VDD = MOSFET driver supply voltage P CC CC f × V DD × = Where: CC = Cross-conduction constant (A*sec) f = Switching frequency VDD = MOSFET driver supply voltage |
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