P89CV51RB2_09 datasheet(32/76 Pages) NXP

32 / 76 page

P89CV51RB2_RC2_RD2_3

Product data sheet

Rev. 03 — 25 August 2009

32 of 76

NXP Semiconductors

P89CV51RB2/RC2/RD2

80C51 with 1 kB RAM, SPI

There is no reload value for TL2 and TH2 in this mode. Even when a capture event occurs

from T2EX, the counter keeps on counting T2 pin transitions or fosc / 6 pulses. Since once

loaded contents of RCAP2L and RCAP2H registers are not protected, once Timer 2

interrupt is signalled it has to be serviced before a new capture event on T2EX pin occurs.

Otherwise, the next falling edge on T2EX pin will initiate reload of the current value from

TL2 and TH2 to RCAP2L and RCAP2H and consequently corrupt their content related to

the previously reported interrupt.

6.5.2 Auto-reload mode (up or down counter)

In the 16-bit auto-reload mode, Timer 2 can be conﬁgured as either a timer or counter (via

C/T2 in T2CON), then programmed to count up or down. The counting direction is

determined by bit DCEN (Down Counter Enable) which is located in the T2MOD register

(see Table 21 and Table 22). When reset is applied, DCEN = 0 and Timer 2 will default to

counting up. If the DCEN bit is set, Timer 2 can count up or down depending on the value

of the T2EX pin.

Figure 12 shows Timer 2 counting up automatically (DCEN = 0).

Fig 11. Timer 2 in Capture mode

002aaa523

OSC

÷6

T2 pin

C/T2 = 0

C/T2 = 1

TL2

(8-bits)

TH2

(8-bits)

TF2

control

capture

TR2

timer 2

interrupt

EXF2

RCAP2L RCAP2H

control

EXEN2

transition

detector

T2EX pin

Fig 12. Timer 2 in Auto-reload mode (DCEN = 0)

002aaa524

OSC

÷6

T2 pin

C/T2 = 0

C/T2 = 1

TL2

(8-bits)

TH2

(8-bits)

TF2

control

reload

TR2

timer 2

interrupt

EXF2

RCAP2L RCAP2H

control

EXEN2

transition

detector

T2EX pin

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