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TLE4267 Datasheet(PDF) 5 Page - Infineon Technologies AG |
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TLE4267 Datasheet(HTML) 5 Page - Infineon Technologies AG |
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5 / 22 page ![]() TLE 4267 Data Sheet 5 Rev. 2.5, 2007-03-20 Figure 2 Pin Configuration (top view) Table 3 Pin Definitions and Functions Pin Symbol Function 1I Input; block to ground directly at the IC by a ceramic capacitor 2E2 Inhibit; device is turned on by High signal on this pin; internal pull-down resistor of 100 k Ω 7RO Reset Output; open-collector output internally connected to the output via a resistor of 30 k Ω 3, 4, 5, 10, 11, 12 GND Ground; connected to rear of chip 8D Reset Delay; connect with capacitor to GND for setting delay 9E6 Hold; see Table 1 for function; this input is connected to output voltage via a pull-up resistor of 50 k Ω 13 Q 5-V Output; block to GND with 22- µF capacitor, ESR ≤ 3 Ω 6, 14 N.C. Not Connected PG-DSO-14-30 AEP02710 E6 GND N.C. N.C. RO GND Q 10 9 GND GND 1 2 3 4 5 GND 6 7D 14 13 12 11 E2 GND 8 Ι |
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