HT56R656 datasheet(84/108 Pages) HOLTEK

84 / 108 page

HT56R62/HT56R65

HT56R642/HT56R644/HT56R654/HT56R656

Rev. 1.00

July 20, 2009

System Operating Modes

The devices have the ability to operate in several differ-

ent modes. This range of operating modes, known as

Normal Mode, Slow Mode, Idle Mode and Sleep Mode,

allow the devices to run using a wide range of different

slow and fast clock sources. The devices also possess

the ability to dynamically switch between different clocks

and operating modes. With this choice of operating

functions users are provided with the flexibility to ensure

they obtain optimal performance from the device ac-

cording to their application specific requirements.

Clock Sources

In discussing the system clocks for the devices, they

can be seen as having a dual clock mode. These dual

clocks are what are known as a High Oscillator and the

other as a Low Oscillator. The High and Low Oscillator

are the system clock sources and can be selected dy-

namically using the HLCLK bit in the CLKMOD register.

The High Oscillator has the internal name fM whose

source is selected using a configuration option from a

choice of either an external crystal/resonator, external

RC oscillator or external clock source.

The Low Oscillator clock source, has the internal name

fSL, whose source is also selected by configuration op-

tion from a choice of either an external 32768Hz oscilla-

tor or the internal 32K_INT oscillator. This internal fSL,fM

clock, is further modified by the SLOWC0~SLOWC2

bits in the CLKMOD register to provide the low fre-

quency clock source fSLOW.

An additional sub internal clock, with the internal name

fSUB, is a 32kHz clock source which can be sourced from

either the internal 32K_INT oscillator or an external

32768 Hz crystal, selected by configuration option. To-

gether with fSYS/4, it is used as a clock source for certain

internal functions such as the LCD driver, Watchdog

Timer, Buzzer, RTC Interrupt and Time Base Interrupt.

The LCD clock source is the fSUB clock source divided by

8, giving a frequency of 4kHz. The internal clock fS,is

simply a choice of either fSUB or fSYS/4, using a configura-

tion option.

Operating Modes

After the correct clock source configuration selections

are made, overall operation of the chosen clock is

achieved using the CLKMOD register. A combination of

the HLCLK and IDLEN bits in the CLKMOD register and

use of the HALT instruction determine in which mode the

device will be run. The devices can operate in the follow-

ing Modes.

· Normal Mode

fM on, fSLOW on, fSYS=fM, CPU on, fS on, fLCD on/off de-

pending upon the LCDEN bit, fWDT on/off depending

upon the WDT configuration option and WDT control

· Slow Mode0

fM off, fSLOW=32K_INT oscillator or the 32768Hz oscil-

lator, fSYS=fSLOW, CPU on, fS on, fLCD on/off depending

upon the LCDEN bit, fWDT on/off depending upon the

WDT configuration option and WDT control register.

C L K M O D R e g i s t e r

f S Y S s e l e c t

1 : f M

0 : f S L O W

I d l e m o d e

1 : e n a b l e

0 : d i s a b l e

H i g h o s c i l l a t o r r e a d y f l a g

1 : t i m e - o u t

0 : n o n - t i m e - o u t

L o w o s c i l l a t o r r e a d y f l a g

1 : t i m e - o u t

0 : n o n - t i m e - o u t

S P I / I C c o n t i n u e s r u n n i n g i n I d l e m o d e

1 : e n a b l e

0 : d i s a b l e

f S L O W s e l e c t i o n

b 0

I D L E N

H L C L K

H T O

L T O

b 7

S L O W C 0

S L O W C 1

S L O W C 2

f S L O W

f S L

f M / 6 4

f M / 3 2

f M / 1 6

f M / 8

f M / 4

f M / 2

S L O W W C 2

S L O W W C 1

S L O W W C 0

S I M I D L E

Clock Control Register

- CLKMOD

HT56R656 Datasheet(PDF) 84 Page - Holtek Semiconductor Inc

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