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AS8530-ASOT Datasheet(PDF) 22 Page - ams AG |
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AS8530-ASOT Datasheet(HTML) 22 Page - ams AG |
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22 / 29 page ![]() www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 0.01 22 - 29 AS8530 Preliminary Data Sheet - A p p l i c a t i o n I n f o r m a t i o n 8.7.1.2 Write Command For Write command RD/WR = 0 After the command code, length of the transfer is send in next two bits, the address of register to be written has to be provided from the MSB to the LSB. Then one, two, four, or eight data bytes can be transferred from the MSB to the LSB. For each data byte following the first one, used address is the incremented value of the previously written address. Each bit of the frame has to be driven by the 2-Wire SP master on the SP clock (EN pin) positive edge and the 2-Wire SP slave (device) samples this bit on the next SP clock (EN pin) negative edge. In the following figures two examples of write command (without and with address self-increment). Figure 14. Protocol for Serial Data Write with Length = 1 Figure 15. Protocol for Serial Data Write with Length = 4 8.7.1.3 Read Command For Read command RD/WR=1. After the command code, length of the transfer is send in next two bits, the address of register to be read has to be provided from the MSB to the LSB. Then one, two, four or eight data bytes can be transferred from the SPI slave to the master, always from the MSB to the LSB. Each bit of the command and address sections of the frame have to be driven by the 2-Wire SP master on the SP clock (EN pin) positive edge and the 2-Wire SP slave (device) samples this bit on the next SP clock (EN pin) negative edge. Each bit of the data phase of the frame has to be driven by the 2-Wire SP slave (device) on the SP clock (EN pin) positive edge and the 2-Wire SP master samples this bit on the next SP clock (EN pin) negative edge. The following figures illustrate two examples of read command (without and with address self-increment.) EN TX 0 LEN1 LEN0 A4 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D7 D6 Transfer edge Sampling edge Data D7 – D0 is moved to Address A4..A0 here LEN1 = 0 LEN0 = 0 Command & Address Phase Data Phase Length of Transaction = 1 EN TX 1 LE N1 LE N0 A 4 A 0 A 1 A 2 A 3 D 0 D 1 D 2 D 3 D 4 D 5 D 7 D 6 D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 D 7 D 1 D 2 D 3 D 4 D 5 D 6 D 7 D 0 Data D7-D0 is moved to Address A4-A0 here 10 Command & Address Phase Data1 Phase Data2 Phase Data3 Phase Data4 Phase LEN1 = 1 LEN0 = 0 Length = 4 Data D7-D0 is moved to Address A4-A0 + 1 here Data D7-D0 is moved to Address A4-A0 + 2 here Data D7-D0 is moved to Address A4-A0 + 3 here |
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