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DM9103 Datasheet(PDF) 2 Page - Davicom Semiconductor, Inc. |
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DM9103 Datasheet(HTML) 2 Page - Davicom Semiconductor, Inc. |
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2 / 89 page ![]() DM9103 3-port switch with PCI Interface 2 Preliminary datasheet DM9103-DS-P02 September 26, 2007 1. GENERAL DESCRIPTION............................................................................................... 8 2. BLOCK DIAGRAM........................................................................................................... 8 3. FEATURES ...................................................................................................................... 9 4. PIN CONFIGURATION : 128 PIN LQFP........................................................................ 10 5. PIN DESCRIPTION ........................................................................................................ 11 5.1 PCI Bus interface................................................................................................................................ 11 5.2 P2 MII / RMII / Reverse MII Interfaces ............................................................................................... 12 5.2.1 MII Interfaces .............................................................................................................................................. 12 5.2.2 RMII Interfaces............................................................................................................................................ 13 5.2.3 Reverse MII Interfaces ................................................................................................................................ 13 5.3 EEPROM Interfaces ........................................................................................................................... 13 5.4 LED Pins............................................................................................................................................. 14 5.5 Clock Interface.................................................................................................................................... 14 5.6 Network Interface ............................................................................................................................... 14 5.7 Miscellaneous Pins............................................................................................................................. 15 5.8 Power Pins ......................................................................................................................................... 15 5.9 Strap pins table................................................................................................................................... 16 5.9.1 Strap pin in 3-port mode.............................................................................................................................. 16 5.9.2 strap pin in 2-port mode .............................................................................................................................. 16 6. REGISTER SET ............................................................................................................. 17 6.1 PCI Configuration Registers............................................................................................................... 17 6.1.1 Identification ID (xxxxxx00H - PCIID) .......................................................................................................... 18 6.1.2 Command & Status (xxxxxx04H - PCICS) .................................................................................................. 18 6.1.3 Revision ID (xxxxxx08H - PCIRV) ............................................................................................................... 19 6.1.4 Miscellaneous Function (xxxxxx0cH - PCILT)............................................................................................. 20 6.1.5 I/O Base Address (xxxxxx10H - PCIIO) ...................................................................................................... 20 6.1.6 Memory Mapped Base Address (xxxxxx14H - PCIMEM)............................................................................ 20 6.1.7 Subsystem Identification (xxxxxx2cH - PCISID).......................................................................................... 21 |
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