 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
10HSI-S008-R0-C Datasheet(PDF) 54 Page - Hirose Electric |
|
|
|||||||||||||||||||||||||||||
10HSI-S008-R0-C Datasheet(HTML) 54 Page - Hirose Electric |
|
|
54 / 71 page  Signal Integrity Report – IT3 (32mm) Page 54 Figure 88 Impedance profile for top corner port 30 of IT3-32mm (connector only) @120ps rise time (20% to 80%) and 2.625GHz BW 4.2.2 Impedance Profile (via + connector + via) The impedance profiles for center port 15, right edge port 20, top edge port 29, and top corner port 30 of the fully populated model (via + connector + via) as portrayed in Figure 84, are shown in Figure 89, Figure 90, Figure 91 and Figure 92. The via model for center port 15 and right edge port 20 are routed on layer 16, and the top edge port 29 and top corner port 30 vias are routed on layer 19. Since the same differential via models were used for our single-ended model analysis, each via will have additional coupling from an adjacent via with routing on the same layer. Figure 89 Impedance profile for center port 15 of IT3-32mm (via+connector+via) with routing on layer 16 @120ps rise time (20% to 80%) and 2.625GHz BW |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
