PCA9554DB datasheet(11/30 Pages) NXP

11 / 30 page

PCA9554_9554A_7

Product data sheet

Rev. 07 — 13 November 2006

11 of 30

NXP Semiconductors

PCA9554/PCA9554A

8-bit I2C-bus and SMBus I/O port with interrupt

Fig 14. Read from register

A2 A1 A0

START condition

R/W

acknowledge

from slave

002aac474

acknowledge

from slave

SDA

command byte

acknowledge

from master

data from register

DATA (first byte)

slave address

STOP

condition

(repeated)

START condition

(cont.)

A2 A1 A0

R/W

acknowledge

from slave

slave address

at this moment master-transmitter becomes master-receiver

and slave-receiver becomes slave-transmitter

no acknowledge

from master

data from register

DATA (last byte)

This ﬁgure assumes the command byte has previously been programmed with 00h.

Transfer of data can be stopped at any moment by a STOP condition.

Fig 15. Read Input Port register

A2 A1 A0

START condition

R/W

acknowledge

from slave

002aac475

acknowledge

from master

SCL

SDA

read from

port

data into

port

th(D)

data from port

no acknowledge

from master

data from port

DATA 4

slave address

DATA 1

STOP

condition

DATA 2

DATA 3

DATA 4

tsu(D)

INT

tv(INT_N)

trst(INT_N)

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