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PPC5125YVN400R Datasheet(PDF) 85 Page - Freescale Semiconductor, Inc |
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PPC5125YVN400R Datasheet(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 92 page  System Design Information MPC5125 Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor 85 Figure 51. COP Connector Diagram 5.5.2.2 Boards Without COP Connector If the JTAG interface is not used, TRST should be tied to PORESET, so that it is asserted when the system reset signal (PORESET) is asserted. This ensures that the JTAG scan chain is initialized during power on. Figure 52 shows the connection of the JTAG interface without COP connector. 1 3 5 7 9 11 13 15 2 4 6 8 10 12 K 16 14 HRESET SRESET VDD_IO VDD_IO TRST VDD_IO TMS VDD_IO TCK VDD_IO TDI CKSTP_OUT TDO 3 11 16 4 9 12 7 6(2) 15 1 10 5(3) 2(4) 13 NC NC NC TDO HRESET SRESET TRST TMS TCK TDI CKSTP_OUT VDD_IO 10 k Ω 10 k Ω 10 k Ω 10 k Ω 10 k Ω COP Header COP Connector Physical Pinout halted qack VDD_IO 10 k Ω PORESET PORESET VDD_IO 10 k Ω CKSTP_IN 8 CKSTP_IN VDD_IO 10 k Ω |
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