HCS12 datasheet(259/452 Pages) FREESCALE

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Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

259

Index register Y points to the base address for the fuzzy inputs and fuzzy

outputs. The value in Y does not change during execution.

Accumulator A holds intermediate results. During antecedent processing, a

MIN function compares each fuzzy input to the value stored in A, and writes

the smaller of the two to A. When all antecedents have been evaluated, A

contains the smallest input value. This is the truth value used during

consequent processing. Accumulator A must be initialized to $FF for the

MIN function to evaluate the inputs of the first rule correctly. For subsequent

rules, the value $FF is written to A when an $FE marker is encountered. At

the end of execution, accumulator A holds the truth value for the last rule.

The V status bit signals whether antecedents (0) or consequents (1) are

being processed. V must be initialized to 0 for processing to begin with the

antecedents of the first rule. Once execution begins, the value of V is

automatically changed as $FE separators are encountered. At the end of

execution, V should equal 1, because the last element before the $FF end

marker should be a rule consequent. If V is equal to 0 at the end of

execution, the rule list is incorrect.

Fuzzy outputs must be cleared to $00 before processing begins in order for

the MAX algorithm used during consequent processing to work correctly.

Residual output values would cause incorrect comparison.

Refer to Section 9. Fuzzy Logic Support for details.

REV

Fuzzy Logic Rule Evaluation

(Continued)

REV

CCR Details:

HIN

––

–

∆

V: 1; Normally set, unless rule structure is erroneous

H, N, Z, and C may be altered by this instruction

Source Form

Address

Mode

Object Code

Access Detail(1)

1. The 3-cycle loop in parentheses is executed once for each element in the rule list. When an interrupt occurs, there is a

2-cycle exit sequence, a 4-cycle re-entry sequence, then execution resumes with a prefetch of the last antecedent or

consequent being processed at the time of the interrupt.

HCS12

M68HC12

REV

(replace comma if interrupted)

Special

18 3A

Orf(t,tx)O

ff + Orf(t,

Orf(t,tx)O

+ Orf(t,

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