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TL16CP754CIPM Datasheet(PDF) 1 Page - Texas Instruments |
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TL16CP754CIPM Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 49 page  TL16CP754C, TL16CM754C, TL16C754C www.ti.com SLLS644E – DECEMBER 2007 – REVISED MAY 2010 QUAD UARTS WITH 64-BYTE FIFO Check for Samples: TL16CP754C, TL16CM754C, TL16C754C 1 FEATURES • ST16C654/654D Pin Compatible With • RS-485 Mode Support Additional Enhancements • Support 1.8-V, 2.5-V, 3.3-V, or 5-V Supply • Support up to 24-MHz Crystal Input Clock • Characterized for Operation From –40°C to (1.5 Mbps) 85°C, Available in Commercial and Industrial • Support up to 48-MHz Oscillator Input Clock Temperature Grades (3 Mbps) for 5-V Operation • Software-Selectable Baud-Rate Generator • Support up to 32-MHz Oscillator Input Clock • Prescalable Provides Additional Divide-by-4 (2 Mbps) for 3.3-V Operation Function • Support up to 24-MHz Input Clock (1.5 Mbps) • Programmable Sleep Mode for 2.5-V Operation • Programmable Serial Interface Characteristics • Support up to 16-MHz Input Clock (1 Mbps) for – 5-, 6-, 7-, or 8-Bit Characters 1.8-V Operation – Even, Odd, or No Parity Bit Generation and • 64-Byte Transmit FIFO Detection • 64-Byte Receive FIFO With Error Flags – 1-, 1.5-, or 2-Stop Bit Generation • Programmable and Selectable Transmit and • False Start Bit Detection Receive FIFO Trigger Levels for DMA and • Complete Status Reporting Capabilities in Interrupt Generation Both Normal and Sleep Mode • Programmable Receive FIFO Trigger Levels for • Line Break Generation and Detection Software/Hardware Flow Control • Internal Test and Loopback Capabilities • Software/Hardware Flow Control • Fully Prioritized Interrupt System Controls – Programmable Xon/Xoff Characters • Modem Control Functions (CTS, RTS, DSR, – Programmable Auto-RTS and Auto-CTS DTR, RI, and CD) • Optional Data Flow Resume by Xon Any • IrDA Capability Character • DMA Signaling Capability for Both Received and Transmitted Data on PN Package DESCRIPTION The '754C is a quad universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 3 Mbps. It incorporates the functionality of four UARTs, each UART having its own register set and FIFOs. The four UARTs share only the data bus interface and clock source, otherwise they operate independently. Another name for the UART function is Asynchronous Communications Element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that four such devices are incorporated into the '754C. The '754C offers enhanced features. It has a transmission control register (TCR) that stores received FIFO threshold level to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loopback capability allows onboard diagnostics. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2007–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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