68HC05C5 datasheet(21/58 Pages) FREESCALE

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Page 15

Section 4: CPU Core

MC68HC05C5 Specification Rev. 1.2

SECTION 4

CPU CORE

4.1

REGISTERS

The MCU contains five registers as shown in the programming model of Figure 4-1. The

interrupt stacking order is shown in Figure 4-2.

4.1.1

ACCUMULATOR (A)

The accumulator is a general purpose 8-bit register used to hold operands and results of

arithmetic calculations or data manipulations.

CCR

Accumulator

Index Register

Program Counter

Stack Pointer

Condition Code Register

Figure 4-1: Programming Model

Index Register

PCL

Accumulator

Condition Code Register

PCH

Stack

Decreasing

Unstack

Increasing

NOTE:

Since

the

Stack

Pointer

decrements during pushes, the

PCL is stacked first, followed by

PCH, etc. Pulling from the stack is

in the reverse order.

Memory

Addresses

Memory

Addresses

Figure 4-2: Stacking Order

Freescale Semiconductor, Inc.

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