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MAC7200 Datasheet(PDF) 128 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 128 Page - Freescale Semiconductor, Inc |
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128 / 976 page ![]() Detailed Signal Descriptions MAC7200 Microcontroller Family Reference Manual, Rev. 2 50 Freescale Semiconductor 4.3.52 PF[9] / PCS[3] — Port F I/O Pin and DSPI_C PF[9] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[3] when in Master mode for the Serial Peripheral Interface C (DSPI_C). It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied using the interrupt functionality. 4.3.53 PF[10] / PCS[2] — Port F I/O Pin and DSPI_C PF[10] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[2] when in Master mode for the Serial Peripheral Interface C (DSPI_C). It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied using the interrupt functionality. 4.3.54 PF[11] / SCK_C — Port F I/O Pin and DSPI_C PF[11] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide either an open drain or push-pull pad. The pin can be configured as serial clock pin SCK of the Serial Peripheral Interface C (DSPI_C). It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied using the interrupt functionality. 4.3.55 PF[12] / PCS[1] — Port F I/O Pin and DSPI_C PF[12] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[1] when in Master mode for the Serial Peripheral Interface C (DSPI_C). It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied using the interrupt functionality. 4.3.56 PF[13] / SOUT_C — Port F I/O Pin and DSPI_C PF[31] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide either an open drain or push-pull pad. The pin can be configured as the output pin of the Serial Peripheral Interface C (DSPI_C). It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied using the interrupt functionality. 4.3.57 PF[14] / PCS[0] / SS[0] — Port F I/O Pin and DSPI_C PF[14] is a configurable general purpose input or output pin. It can be configured to provide either high or reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide either an open drain or push-pull pad. The pin can be configured as chip select pin PCS[0] when in Master mode, or as slave select pin SS when in Slave mode for the Serial Peripheral Interface C (DSPI_C). It can |
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