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MAC7200 Datasheet(PDF) 178 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 178 Page - Freescale Semiconductor, Inc |
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178 / 976 page  Debug Application Usage MAC7200 Microcontroller Family Reference Manual, Rev. 2 100 Freescale Semiconductor • The ARM7 core is placed into Halt Mode or Monitor Mode, depending on the state of the DCR[4] bit. • The ARM7 core asserts the DBGACK output • The CRG asserts the ipg_debug signal • The Real Time Interrupt (RTI) clock rti_osc_ps_clk is shut off by the CRG • The Software Watchdog Timer (SWT) clock swt_osc_ps_clk is shut off by the CRG • Debug Mode is optional for all peripherals except the SWT and RTI • All peripheral level debug features are enabled (Please refer to the individual chapters for a complete description of functionality in Debug Mode). —DMA2 — FlexCAN2 — DSPI —eMIOS —ATD — MCM (Software Watchdog Timer) 8.8.3 Exiting Debug mode • The ARM7 core exits the debug state • The ARM7 core exits Halt/Monitor Mode • The ARM7 core negates the DBGACK output • The CRG negates the ipg_debug signal • The Real Time Interrupt (RTI) clock rti_osc_ps_clk is turned on by the CRG • The Software Watchdog Timer (SWT) clock swt_osc_ps_clk is turned on by the CRG • All peripheral level debug features are disabled (Please refer to the individual chapters for a complete description of functionality in Debug Mode). —DMA2 — FlexCAN2 — DSPI —eMIOS —ATD — MCM (Software Watchdog Timer) 8.8.4 Nexus Low Power State Both the Debug and Doze mode states may be determined by reading out the Nexus LPS bits. Please refer to Table 11-9 for the exact encodings. |
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