56F8013 datasheet(39/126 Pages) FREESCALE

39 / 126 page

Peripheral Memory Mapped Registers

56F8013/56F8011 Data Sheet, Rev. 12

Freescale Semiconductor

ADC_HILIM0

$19

High Limit Register 0

ADC_HILIM1

$1A

High Limit Register 1

ADC_HILIM2

$1B

High Limit Register 2

ADC_HILIM3

$1C

High Limit Register 3

ADC_HILIM4

$1D

High Limit Register 4

ADC_HILIM5

$1E

High Limit Register 5

ADC_HILIM6

$1F

High Limit Register 6

ADC_HILIM7

$20

High Limit Register 7

ADC_OFFST0

$21

Offset Register 0

ADC_OFFST1

$22

Offset Register 1

ADC_OFFST2

$23

Offset Register 2

ADC_OFFST3

$24

Offset Register 3

ADC_OFFST4

$25

Offset Register 4

ADC_OFFST5

$26

Offset Register 5

ADC_OFFST6

$27

Offset Register 6

ADC_OFFST7

$28

Offset Register 7

ADC_PWR

$29

Power Control Register

ADC_VREF

$2A

Voltage Reference Register

Reserved

Table 4-13 Serial Communication Interface Registers Address Map

(SCI_BASE = $00 F0B0)

Address Offset

SCI_RATE

Baud Rate Register

SCI_CTRL1

Control Register 1

SCI_CTRL2

Control Register 2

SCI_STAT

Status Register

SCI_DATA

Data Register

Table 4-14 Serial Peripheral Interface Registers Address Map

(SPI_BASE = $00 F0C0)

Address Offset

SPI_SCTRL

Status and Control Register

SPI_DSCTRL

Data Size and ControlRegister

SPI_DRCV

Data Receive Register

SPI_DXMIT

Data Transmit Register

Table 4-12 Analog-to-Digital Converter Registers Address Map (Continued)

(ADC_BASE = $00 F080)

Address Offset

56F8013 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

56F8013 Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc

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