TUSB3210_1 datasheet(36/45 Pages) TI

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2.11.2 Current Address Read Operation

2.11.3 Sequential Read Operation

TUSB3210

Universal Serial Bus

General-Purpose Device Controller

SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007

SDA).

7. The content of the I2CDAO register is transmitted to the EEPROM (EEPROM address).

8. The TXE bit in I2CSTA is set, and interrupts the MCU, indicating that the I2CDAO register has been

transmitted.

9. No stop condition is generated.

EEPROM [Low Byte]

1. The MCU writes the low byte of the EEPROM address into the I2CDAO register.

2. The TXE bit in I2CSTA is cleared, indicating busy.

3. The content of the I2CDAO register is transmitted to the device (EEPROM address).

4. The TXE bit in I2CSTA is set, and interrupts the MCU, indicating that the I2CDAO register has been

transmitted.

5. This completes the dummy write operation. At this point, the EEPROM address is set and the MCU

can do a single or a sequential read operation.

Once the EEPROM address is set, the MCU can read a single byte by executing the following steps:

1. The MCU sets I2CSTA[SRD] = 1, forcing the I2C controller to generate a stop condition after the

I2CDAI register is received.

2. The MCU writes the device address (R/W bit = 1) to the I2CADR register (read operation).

3. The MCU writes a dummy byte to the I2CDAO register, starting the transfer on the SDA line.

4. The RXF bit in I2CSTA is cleared.

5. The content of the I2CADR register is transmitted to the device, preceded by a start condition on SDA.

6. Data from the EEPROM is latched into the I2CDAI register (stop condition is transmitted).

7. The RXF bit in I2CSTA is set, and interrupts the MCU, indicating that the data is available.

8. The MCU reads the I2CDAI register. This clears the RXF bit (I2CSTA[RXF] = 0).

Once the EEPROM address is set, the MCU can execute a sequential read operation by executing the

following steps (Note: this example illustrates a 32-byte sequential read):

1. Device Address

The MCU sets I2CSTA[SRD] = 0. This prevents the I2C controller from generating a stop condition

after the I2CDAI register is received.

The MCU writes the device address (R/W bit = 1) to the I2CADR register (read operation).

The MCU writes a dummy byte to the I2CDAO register, starting the transfer on the SDA line.

The RXF bit in I2CSTA is cleared.

The content of the I2CADR register is transmitted to the device (preceded by a start condition on

SDA).

2. N-Byte Read (31 bytes)

Data from the device is latched into the I2CDAI register (stop condition is not transmitted).

The RXF bit in I2CSTA is set and interrupts the MCU, indicating that data is available.

The MCU reads the I2CDAI register, clearing the RXF bit (I2CSTA[RXF] = 0).

This operation repeats 31 times.

3. Last-Byte Read (byte no. 32)

The MCU sets I2CSTA[SRD] = 1. This forces the I2C controller to generate a stop condition after

the I2CDAI register is received.

Data from the device is latched into the I2CDAI register (stop condition is transmitted).

The RXF bit in I2CSTA is set and interrupts the MCU, indicating that data is available.

Functional Description

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