TUSB3210_1 datasheet(16/45 Pages) TI

Part #	TUSB3210

Description	Universal Serial Bus General-Purpose Device Controller

PDF	45 Pages

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Manufacturer	TI [Texas Instruments]

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2.3

Buffers + I/O RAM Map

TUSB3210

Universal Serial Bus

General-Purpose Device Controller

SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007

The address range from FD80 to FFFF is reserved for data buffers, setup packet, endpoint descriptor

blocks (EDB), and all I/O. RAM space of 512 bytes [FD80–FF7F] is used for EDB and buffers. The

FF80–FFFF range is used for memory-mapped registers (MMR). Table 2-1 represents the internal XDATA

space allocation.

Table 2-1. XDATA Space

DESCRIPTION

ADDRESS RANGE

FFFF

Internal

memory-mapped registers

↑

(MMR)

FF80

FF7F

Endpoint descriptor blocks

↑

(EDB)

FF08

FF07

Setup packet buffer

↑

FF00

FEFF

512-Byte

Input endpoint-0 buffer

↑

RAM

FEF8

FEF7

Output endpoint-0 buffer

↑

FEF0

FEEF

Data buffers

↑

(368 bytes)

FD80

Functional Description

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