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ATXMEGA128D4 Datasheet(PDF) 14 Page - ATMEL Corporation |
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ATXMEGA128D4 Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 100 page ![]() 14 8135G–AVR–08/10 XMEGA D4 Table 7-2. Number of words and Pages in the Flash. Table 7-3 on page 14 shows EEPROM memory organization for the XMEGA D4 devices. EEPROM write and erase operations can be performed one page or one byte at the time, while reading the EEPROM is done one byte at the time. For EEPROM access the NVM Address Register (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) give the page number and the least significant address bits (E2BYTE) give the byte in the page. Table 7-3. Number of Bytes and Pages in the EEPROM. Devices Flash Page Size FWORD FPAGE Application Boot Size (words) Size No of Pages Size No of Pages ATxmega16D4 16 KB + 4 KB 128 Z[6:0] Z[13:7] 16 KB 64 4 KB 16 ATxmega32D4 32 KB + 4 KB 128 Z[6:0] Z[14:7] 32 KB 128 4 KB 16 ATxmega64D4 64 KB + 4 KB 128 Z[6:0] Z[15:7] 64 KB 256 4 KB 16 ATxmega128D4 128 KB + 8 KB 256 Z[7:0] Z[16:8] 128 KB 256 8 KB 16 Devices EEPROM Page Size E2BYTE E2PAGE No of Pages Size (Bytes) ATxmega16D4 1 KB 32 ADDR[4:0] ADDR[10:5] 32 ATxmega32D4 1 KB 32 ADDR[4:0] ADDR[10:5] 32 ATxmega64D4 2 KB 32 ADDR[4:0] ADDR[10:5] 64 ATxmega128D4 2 KB 32 ADDR[4:0] ADDR[10:5] 64 |
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