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PIC18LF4331-E/ML Datasheet(PDF) 230 Page - Microchip Technology |
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PIC18LF4331-E/ML Datasheet(HTML) 230 Page - Microchip Technology |
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230 / 392 page  PIC18F2331/2431/4331/4431 DS39616D-page 230 2010 Microchip Technology Inc. To set up an Asynchronous Transmission: 1. Initialize the SPBRG register for the appropriate baud rate. If a high-speed baud rate is desired, set bit, BRGH (see Section 20.2 “EUSART Baud Rate Generator (BRG)” ). 2. Enable the asynchronous serial port by clearing bit, SYNC, and setting bit, SPEN. 3. If interrupts are desired, set enable bit, TXIE. 4. If 9-bit transmission is desired, set transmit bit, TX9. Can be used as address/data bit. 5. Enable the transmission by setting bit, TXEN, which will also set bit, TXIF. 6. If 9-bit transmission is selected, the ninth bit should be loaded in bit, TX9D. 7. Load data to the TXREG register (starts transmission). If using interrupts, ensure that the GIE and PEIE bits in the INTCON register (INTCON<7:6>) are set. FIGURE 20-6: ASYNCHRONOUS RECEPTION TABLE 20-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on Page: INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 54 PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 57 PIE1 — ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 57 IPR1 — ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 57 RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 56 RCREG EUSART Receive Register 56 TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 56 BAUDCON — RCIDL — SCKP BRG16 — WUE ABDEN 56 SPBRGH EUSART Baud Rate Generator Register High Byte 56 SPBRG EUSART Baud Rate Generator Register Low Byte 56 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for asynchronous reception. Start bit bit 7/8 bit 1 bit 0 bit 7/8 bit 0 Stop bit Start bit bit 7/8 RX (Pin) Reg Rcv Buffer Reg Rcv Shift Read Rcv Buffer Reg RCREG RCIF (Interrupt Flag) OERR bit CREN Word 1 RCREG Word 2 RCREG Stop bit Note: This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after the third word, causing the OERR (Overrun) bit to be set. Start bit Stop bit |
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