PIC18LF4331-ESLASHML datasheet(241/392 Pages) MICROCHIP

241 / 392 page

 2010 Microchip Technology Inc.

DS39616D-page 241

PIC18F2331/2431/4331/4431

ADCON1: A/D CONTROL REGISTER 1

R/W-0

U-0

R/W-0

R-0

VCFG1

VCFG0

—

FIFOEN

BFEMT

BFOVL

ADPNT1

ADPNT0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

VCFG<1:0>:

A/D VREF+ and A/D VREF- Source Selection bits

=VREF+ = AVDD, VREF- = AVSS (AN2 and AN3 are analog inputs or digital I/O)

=VREF+ = External VREF+, VREF- = AVSS (AN2 is an analog input or digital I/O)

=VREF+ = AVDD, VREF- = External VREF- (AN3 is an analog input or digital I/O)

=VREF+ = External VREF-, VREF- = External VREF-

bit 5

Unimplemented:

Read as ‘0’

bit 4

FIFOEN

: FIFO Buffer Enable bit

= FIFO is enabled

= FIFO is disabled

bit 3

BFEMT

: Buffer Empty bit

= FIFO is empty

= FIFO is not empty (at least one of four locations has unread A/D result data)

bit 2

BFOVFL

: Buffer Overflow bit

= A/D result has overwritten a buffer location that has unread data

= A/D result has not overflowed

bit 1-0

ADPNT<1:0>

: Buffer Read Pointer Location bits

Designates the location to be read next.

= Buffer Address 0

= Buffer Address 1

= Buffer Address 2

= Buffer Address 3

PIC18LF4331-E/ML Datasheet(PDF) 241 Page - Microchip Technology

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