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PIC18LF4331-E/ML Datasheet(PDF) 347 Page - Microchip Technology |
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PIC18LF4331-E/ML Datasheet(HTML) 347 Page - Microchip Technology |
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347 / 392 page ![]() 2010 Microchip Technology Inc. DS39616D-page 347 PIC18F2331/2431/4331/4431 TABLE 26-5: PLL CLOCK TIMING SPECIFICATIONS (VDD = 4.2V TO 5.5V) Param No. Sym Characteristic Min Typ† Max Units Conditions F10 FOSC Oscillator Frequency Range 4 — 10 MHz HS mode only F11 FSYS On-Chip VCO System Frequency 16 — 40 MHz HS mode only F12 TPLL PLL Start-up Time (Lock Time) — — 2 ms F13 CLK CLKO Stability (Jitter) -2 — +2 % † Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not tested. TABLE 26-6: INTERNAL RC ACCURACY PIC18LF2331/2431/4331/4431 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C TA +85°C for industrial PIC18F2331/2431/4331/4431 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C TA +85°C for industrial -40°C TA +125°C for extended Param No. Device Min Typ Max Units Conditions INTOSC Accuracy @ Freq = 8 MHz, 4 MHz, 2 MHz, 1 MHz, 500 kHz, 250 kHz, 125 kHz(1) F2 PIC18LF2331/2431/4331/4431 -15 +/-5 +15 % 25°C VDD = 3.0V F3 All devices -15 +/-5 +15 % 25°C VDD = 5.0V INTRC Accuracy @ Freq = 31 kHz(2) F5 PIC18LF2331/2431/4331/4431 26.562 — 35.938 kHz 25°C VDD = 3.0V F6 All devices 26.562 — 35.938 kHz 25°C VDD = 5.0V Legend: Shading of rows is to assist in readability of the table. Note 1: Frequency calibrated at 25°C. OSCTUNE register can be used to compensate for temperature drift. 2: INTRC frequency after calibration. |
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