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PIC18LF4331-E/ML Datasheet(PDF) 103 Page - Microchip Technology |
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PIC18LF4331-E/ML Datasheet(HTML) 103 Page - Microchip Technology |
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103 / 392 page ![]() 2010 Microchip Technology Inc. DS39616D-page 103 PIC18F2331/2431/4331/4431 REGISTER 10-5: PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2 R/W-0 U-0 U-0 R/W-0 U-0 R/W-0 U-0 R/W-0 OSCFIF — — EEIF —LVDIF — CCP2IF bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 OSCFIF: Oscillator Fail Interrupt Flag bit 1 = Device oscillator failed, clock input has changed to INTOSC (must be cleared in software) 0 = Device clock operating bit 6-5 Unimplemented: Read as ‘0’ bit 4 EEIF: EEPROM or Flash Write Operation Interrupt Flag bit 1 = The write operation is complete (must be cleared in software) 0 = The write operation is not complete or has not been started bit 3 Unimplemented: Read as ‘0’ bit 2 LVDIF: Low-Voltage Detect Interrupt Flag bit 1 = The supply voltage has fallen below the specified LVD voltage (must be cleared in software) 0 = The supply voltage is greater than the specified LVD voltage bit 1 Unimplemented: Read as ‘0’ bit 0 CCP2IF: CCP2 Interrupt Flag bit Capture mode: 1 = A TMR1 register capture occurred (must be cleared in software) 0 = No TMR1 register capture occurred Compare mode: 1 = A TMR1 register compare match occurred (must be cleared in software) 0 = No TMR1 register compare match occurred PWM mode: Not used in this mode. |
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