PIC18LF4331-ESLASHML datasheet(145/392 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS39616D-page 145

PIC18F2331/2431/4331/4431

16.0

CAPTURE/COMPARE/PWM

(CCP) MODULES

The CCP (Capture/Compare/PWM) module contains a

16-bit register that can operate as a 16-bit Capture reg-

ister, a 16-bit Compare register or a PWM Master/Slave

Duty Cycle register. Table 16-1 shows the timer

resources required for each of the CCP module modes.

The operation of CCP1 is identical to that of CCP2, with

the exception of the Special Event Trigger. Therefore,

operation of a CCP module is described with respect to

CCP1, except where noted.

16.1

CCP1 Module

Capture/Compare/PWM Register 1 (CCPR1) is

comprised of two 8-bit registers: CCPR1L (low byte)

and CCPR1H (high byte). The CCP1CON register

controls the operation of CCP1. All are readable and

writable.

TABLE 16-1:

CCP MODE – TIMER

RESOURCES

16.2

CCP2 Module

Capture/Compare/PWM Register 2 (CCPR2) is com-

prised of two 8-bit registers: CCPR2L (low byte) and

CCPR2H (high byte). The CCP2CON register controls

the operation of CCP2. All are readable and writable.

CCP Mode

Timer Resources

Capture

Compare

PWM

Timer1

Timer2

CCPxCON: CCPx CONTROL REGISTER

U-0

R/W-0

—

DCxB1

DCxB0

CCPxM3

CCPxM2

CCPxM1

CCPxM0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented:

Read as ‘0’

bit 5-4

DCxB<1:0>

: PWM Duty Cycle bit 1 and bit 0

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSBs (bit 1 and bit 0) of the 10-bit PWM duty cycle. The upper eight bits

(DCxB<9:2>) of the duty cycle are found in CCPRxL.

bit 3-0

CCPxM<3:0>

: CCPx Mode Select bits

0000

= Capture/Compare/PWM disabled (resets CCPx module)

0001

= Reserved

0010

= Compare mode; toggle output on match (CCPxIF bit is set)

0011

= Reserved

0100

= Capture mode; every falling edge

0101

= Capture mode; every rising edge

0110

= Capture mode; every 4th rising edge

0111

= Capture mode; every 16th rising edge

1000

= Compare mode; initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit is set)

1001

= Compare mode; initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF bit is set)

1010

= Compare mode; generate software interrupt on compare match (CCPxIF bit is set, CCPx pin is

unaffected)

1011

= Compare mode; Special Event Trigger (CCPxIF bit is set)

11xx

=PWM mode

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