IXP45X datasheet(66/148 Pages) INTEL

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August 2006

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors Datasheet

Document Number: 306261-004US

Table 16.

Expansion Bus Interface (Sheet 1 of 3)

Name

Power

Reset†

Normal

After

Reset

Until

Software

Enables

Possible

Configur

ations

After

Software

Enables

Type†

Description

EX_CLK

Input clock signal used to sample all expansion interface inputs and clock all expansion interface

outputs.

EX_ALE

VO / Z

TRI

Expansion bus Address-latch enable used for multiplexed address/data bus accesses, as an Advance

pin for Intel synchronous modes of operation/ZBT SRAM mode of operation, and LD_N for ZBT

SRAM. EX_ALE is always used by outbound transfers.

EX_ADDR[24:0]

I/O

Expansion bus address used as an output for data accesses over the expansion bus when executing

outbound transactions and used as an input for data accesses over the expansion bus when

executing inbound transactions. Also, used as an input during reset to capture device configuration.

These signals have a weak pull-up resistor attached internally. Based on the desired configuration,

various address signals must be tied low in order for the device to operate in the desired mode. A

4.7 KΩ pull-down resistor is required to override these pull-up resistors. These pull-ups are disabled

when PLL_LOCK is asserted and the IXP45X/IXP46X network processors drive the signal based upon

grant. EX_ADDR is driven by IXP45X/IXP46X network processors except when grant is asserted to

an external master or during reset.

Very Important Note: See Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Developer’s Manual for additional details on address strapping.

EX_WR_N

I/O

Expansion bus write enable signal is used as an Intel-mode write strobe / Motorola-mode data

strobe (EXP_MOT_DS_N) / TI*-mode data strobe (TI_HDS1_N) / ZBT SRAM mode read/

write_n(ZBT_RD_WR_N) for outbound transactions. This signal is an output for outbound

transactions.

Expansion bus write enable signal is used as a write enable signal to the IXP45X/IXP46X network

processors for inbound transaction support. This signal is an input for inbound transactions.

EX_WR_N is driven by IXP45X/IXP46X network processors unless grant is asserted to an external

master

EX_RD_N

I/O

Expansion bus read enable signal is used as an Intel-mode read strobe / Motorola-mode read-not-

write (EXPB_MOT_RNW) / TI mode read-not-write (TI_HR_W_N) / ZBT SRAM mode output enable

(ZBT_OE_N) for outbound transactions. This signal is an output for outbound transactions.

Expansion bus read enable signal is used as a read enable signal to the IXP45X/IXP46X network

processors for inbound transaction support. This signal is an input for inbound transactions.

EX_RD_N is driven by IXP45X/IXP46X network processors unless grant is asserted to an external

master.

Note:

This table discusses all features supported on the Intel® IXP45X and Intel® IXP46X Product Line of Network Processors. For details on feature support listed by processor,

see Table 1 on page 13.

†

For a legend of the Type codes, see Table 8 on page 43.

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