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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Datasheet

August 2006

104

Document Number: 306261-004US

5.2

VCCPLL1, VCCPLL2, VCCPLL3, OSC_VCCP, OSC_VCC Pin

Requirements

To reduce voltage-supply noise on the analog sections of the IXP45X/IXP46X network

processors, the phase-lock loop circuits (VCCPLL1, VCCPLL2, VCCPLL3) and oscillator circuit

(OSC_VCC, OSC_VCCP) require isolated voltage supplies.

The filter circuits for each supply are shown in the following sections.

5.2.1

VCCPLL1 Requirement

A parallel combination of a 10-nF capacitor (for bypass) and a 200-nF capacitor (for a

first-order filter with a cut-off frequency below 30 MHz) must be connected to the

VCCPLL1 pin of the IXP45X/IXP46X network processors.

The ground of both capacitors should be connected to the nearest VSS supply pin. Both

capacitors should be located less than 0.5 inch away from the VCCPLL1 pin and the

associated VSS pin. In order to achieve the 200-nF capacitance, a parallel combination

of two 100-nF capacitors may be used as long as the capacitors are placed directly

beside each other.

5.2.2

VCCPLL2 Requirement

A parallel combination of a 10-nF capacitor (for bypass) and a 200-nF capacitor (for a

first-order filter with a cut-off frequency below 30 MHz) must be connected to the

VCCPLL2 pin of the IXP45X/IXP46X network processors.

The ground of both capacitors should be connected to the nearest VSS supply pin. Both

capacitors should be located less than 0.5 inch away from the VCCPLL2 pin and the

associated VSS pin. In order to achieve the 200-nF capacitance, a parallel combination

of two 100-nF capacitors may be used as long as the capacitors are placed directly

beside each other.

Figure 9.

VCCPLL1 Power Filtering Diagram

Vc c

In te l®

IX P4 5 X /IX P 4 6 X

Ne tw o r k

Pr o c e s s o r s

10 nF

V SS

V CC P L L 1

100 nF

V SS

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