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MCF5213 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc |
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MCF5213 Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 54 page ![]() Electrical Characteristics MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor 39 Figure 9. QSPI Timing 2.16 JTAG and Boundary Scan Timing Table 37. JTAG and Boundary Scan Timing Num Characteristics1 1 JTAG_EN is expected to be a static signal. Hence, it is not associated with any timing. Symbol Min Max Unit J1 TCLK frequency of operation fJCYC DC 1/4 fsys/2 J2 TCLK cycle period tJCYC 4 × t CYC —ns J3 TCLK clock pulse width tJCW 26 — ns J4 TCLK rise and fall times tJCRF 03 ns J5 Boundary scan input data setup time to TCLK rise tBSDST 4— ns J6 Boundary scan input data hold time after TCLK rise tBSDHT 26 — ns J7 TCLK low to boundary scan output data valid tBSDV 033 ns J8 TCLK low to boundary scan output high Z tBSDZ 033 ns J9 TMS, TDI input data setup time to TCLK rise tTAPBST 4— ns J10 TMS, TDI Input data hold time after TCLK rise tTAPBHT 10 — ns J11 TCLK low to TDO data valid tTDODV 026 ns J12 TCLK low to TDO high Z tTDODZ 08 ns J13 TRST assert time tTRSTAT 100 — ns J14 TRST setup time (negation) to TCLK high tTRSTST 10 — ns QSPI_CS[3:0] QSPI_CLK QSPI_DOUT QS5 QS1 QSPI_DIN QS3 QS4 QS2 |
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