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CMX625P4 Datasheet(PDF) 32 Page - CML Microcircuits

Part # CMX625P4
Description  ISDN TA POTS Interface
PDF  34 Pages
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Manufacturer  CMLMICRO [CML Microcircuits]
Direct Link  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

CMX625P4 Datasheet(HTML) 32 Page - CML Microcircuits

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ISDN TA POTS Interface
CMX625
 2001 Consumer Microcircuits Limited
32
D/625/2
IOM-2 Bus Timing
(See Figure 13)
Notes
Min.
Typ.
Max.
Unit
tDCL
DCL clock period in TE Mode
1
-
651
-
ns
tDCL
DCL clock period in non-TE Mode
1
-
244
-
ns
tR / tF
DCL clock rise time / fall time
1
-
-
60
ns
FSC
FSC period
1
-
125
-
µs
tFSCS
FSC set-up time
1
70
-
-
ns
tFSCH
FSC hold time
1
40
-
-
ns
tDUDC
DU delay clock (data out)
2
-
-
100
ns
tDUDF
DU delay frame (data out)
2
-
-
150
ns
Notes:
1. These signals are requirements and are not under control of CMX625.
2. Condition CL = 150pF.
Figure 13 IOM-2 Bus Timing Diagram
Typical UART Timings
(See Figures 9a and 9b)
Notes
Min.
Typ.
Max.
Unit
TFSK
(delay through the modulator)
-
106
-
µs
TDLY
(1 bit period)
-
833
-
µs
TDRDY
(¼ bit-period)
-
208
-
µs
TUFL
(¾ bit-period)
-
625
-
µs



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