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FX818 Datasheet(PDF) 13 Page - CML Microcircuits |
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FX818 Datasheet(HTML) 13 Page - CML Microcircuits |
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13 / 26 page ![]() CTCSS Signalling Processor FX818 © 1997 Consumer Microcircuits Limited 13 D/818/4 AUDIO CONTROL Register (Hex address $8A) This is a 16-bit register. Byte (1) is sent first. The six least significant bits of the first byte in this register are used to set the attenuation of the Modulator 1 amplifier and the six least significant bits of the second byte in this register are used to set the attenuation of the Modulator 2 amplifier, according to the tables below: BYTE 1 BYTE 2 5 4 3 2 1 0 Mod. 1 Attenuation 5 4 3 2 1 0 Mod. 2 Attenuation 0 X X X X X Disabled (VBIAS) 0 X X X X X Disabled (VBIAS) 1 0 0 0 0 0 >40dB 1 0 0 0 0 0 >40dB 1 0 0 0 0 1 12.0dB 1 0 0 0 0 1 6.0dB 1 0 0 0 1 0 11.6dB 1 0 0 0 1 0 5.8dB 1 0 0 0 1 1 11.2dB 1 0 0 0 1 1 5.6dB 1 0 0 1 0 0 10.8dB 1 0 0 1 0 0 5.4dB 1 0 0 1 0 1 10.4dB 1 0 0 1 0 1 5.2dB 1 0 0 1 1 0 10.0dB 1 0 0 1 1 0 5.0dB 1 0 0 1 1 1 9.6dB 1 0 0 1 1 1 4.8dB 1 0 1 0 0 0 9.2dB 1 0 1 0 0 0 4.6dB 1 0 1 0 0 1 8.8dB 1 0 1 0 0 1 4.4dB 1 0 1 0 1 0 8.4dB 1 0 1 0 1 0 4.2dB 1 0 1 0 1 1 8.0dB 1 0 1 0 1 1 4.0dB 1 0 1 1 0 0 7.6dB 1 0 1 1 0 0 3.8dB 1 0 1 1 0 1 7.2dB 1 0 1 1 0 1 3.6dB 1 0 1 1 1 0 6.8dB 1 0 1 1 1 0 3.4dB 1 0 1 1 1 1 6.4dB 1 0 1 1 1 1 3.2dB 1 1 0 0 0 0 6.0dB 1 1 0 0 0 0 3.0dB 1 1 0 0 0 1 5.6dB 1 1 0 0 0 1 2.8dB 1 1 0 0 1 0 5.2dB 1 1 0 0 1 0 2.6dB 1 1 0 0 1 1 4.8dB 1 1 0 0 1 1 2.4dB 1 1 0 1 0 0 4.4dB 1 1 0 1 0 0 2.2dB 1 1 0 1 0 1 4.0dB 1 1 0 1 0 1 2.0dB 1 1 0 1 1 0 3.6dB 1 1 0 1 1 0 1.8dB 1 1 0 1 1 1 3.2dB 1 1 0 1 1 1 1.6dB 1 1 1 0 0 0 2.8dB 1 1 1 0 0 0 1.4dB 1 1 1 0 0 1 2.4dB 1 1 1 0 0 1 1.2dB 1 1 1 0 1 0 2.0dB 1 1 1 0 1 0 1.0dB 1 1 1 0 1 1 1.6dB 1 1 1 0 1 1 0.8dB 1 1 1 1 0 0 1.2dB 1 1 1 1 0 0 0.6dB 1 1 1 1 0 1 0.8dB 1 1 1 1 0 1 0.4dB 1 1 1 1 1 0 0.4dB 1 1 1 1 1 0 0.2dB 1 1 1 1 1 1 0dB 1 1 1 1 1 1 0dB X = don't care MOD1 ENABLE (Bit 5, first byte) When this bit is "1" the MOD1 attenuator is enabled. When this bit is "0" the MOD1 attenuator is disabled (i.e. powersaved). MOD2 ENABLE (Bit 5, second byte) When this bit is "1" the MOD2 attenuator and the SUMMER AMP are enabled. When this bit is "0" they are both disabled (i.e. powersaved). (Bits 7 and 6, first and second bytes) Reserved for future use. These should be set to "0" |
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