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FMP1216ACX Datasheet(PDF) 5 Page - FIDELIX |
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FMP1216ACX Datasheet(HTML) 5 Page - FIDELIX |
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5 / 12 page  FMP1216ACx CMOS LPRAM AC CHARACTERISTICS(VCC=1.7V~1.95V) AC CHARACTERISTICS(VCC 1.7V 1.95V) Parameter List Symbol Speed Bins Units 70ns Min Max Read Cycle Time tRC 70 20k ns Address Access Time tAA - 70 ns Chip Select to Output tCO - 70 ns Read pp tCO 70 ns Output Enable to Valid Output tOE - 25 ns /UB, /LB Access Time tBA - 25 ns Chip Select to Low-Z Output tLZ 10 - ns /UB, /LB Enable to Low-Z Output tBLZ 10 - ns Output Enable to Low-Z Output tOLZ 5 - ns Chip Disable to High- Z Output tHZ 0 5 ns /UB, /LB Disable to High- Z Output tBHZ 0 5 ns Output Disable to High- Z Output tOHZ 0 5 ns Output Hold from Address Change tOH 5 - ns Write Cycle Time tWC 70 20k ns Chip Select to End of Write tCW 60 - ns Address Set-up Time tAS 0 - ns Write Address Valid to End of Write tAW 60 - ns /UB, /LB Valid to End of Write tBW 60 - ns Write Pulse Width tWP 50 - ns Write Recovery Time tWR 0 - ns Write to Output High-Z tWHZ 0 5 ns Data to Write Time Overlap tDW 20 - ns Dt Hld f W it Ti tDH 0 Data Hold from Write Time tDH 0 -ns End Write to Output Low-Z tOW 5 - ns Page Page Mode Cycle Time tPC 25 - ns Page Mode Address Access Time tPAA - 25 ns Maximum Cycle Time tMRC - 20k ns /CS High Pulse Width tCP 10 - ns 1 /CS High Pulse Width is defined by /CS 1. /CS High Pulse Width is defined by /CS. Revision 0.1 Oct. 2010 5 |
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